summaryrefslogtreecommitdiff
path: root/src/mainboard/google/snow
diff options
context:
space:
mode:
authorHung-Te Lin <hungte@chromium.org>2013-08-06 10:48:48 +0800
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 22:45:11 +0100
commitc0491d4fb55eaa7a18cb46dfab886eeb195b9323 (patch)
tree5f88d30d51bba5ec680c054612fe7ac2f3f89ac3 /src/mainboard/google/snow
parentc0d5eb2a332a7db1311517032e6f9ce1d5b91551 (diff)
armv7/exynos: Fix and remove memory reset workarounds
The memory corruption problem in Exynos suspend/resume process is caused by two things together: PHY_RESET and MRS command. After stop sending MRS on resume, we can now remove the workaround of skipping PHY_RESET. Change-Id: I64acc27c1d2bb549ae6ad7d32ecda94b0355972c Reviewed-on: https://gerrit.chromium.org/gerrit/64736 Tested-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/4433 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/google/snow')
-rw-r--r--src/mainboard/google/snow/romstage.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index f69fb1f7eb..92fa21e4a1 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -141,13 +141,6 @@ static void setup_memory(struct mem_timings *mem, int is_resume)
mem->mpll_mdiv,
mem->frequency_mhz);
- /* FIXME Currently memory initialization with mem_reset on normal boot
- * will cause resume to fail (even if we don't do mem_reset on resume),
- * and the workaround is to temporarily always enable "is_resume".
- * This should be removed when the root cause of resume issue is found.
- */
- is_resume = 1;
-
if (ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE, !is_resume)) {
die("Failed to initialize memory controller.\n");
}