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authorDavid Hendricks <dhendrix@chromium.org>2013-03-21 21:58:50 -0700
committerRonald G. Minnich <rminnich@gmail.com>2013-03-26 00:10:31 +0100
commitf9be756b559ccc567e5412c85b5ded98f19617e7 (patch)
tree753c8f5d36b7023766ae9f11561ce86183a13e13 /src/mainboard/google/snow/romstage.c
parent04d352db41522b3c7aec2ce574ff90484bc0ad8a (diff)
armv7: add new dcache and MMU setup functions
This adds new MMU setup code. Most notably, this version uses cbmem_add() to determine the translation table base address, which in turn is necessary to ensure payloads which wipe memory can tell which regions to wipe out. TODOs: - Finish cleaning up references to old cache/MMU stuff - Add L2 setup (from exynos_cache.c) - Set up ranges dynamically rather than in ramstage's main(). Change-Id: Iba5295a801e8058a3694e4ec5b94bbe9a69d3ee6 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2877 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google/snow/romstage.c')
-rw-r--r--src/mainboard/google/snow/romstage.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index bfb4156b68..39069b2d95 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -113,9 +113,6 @@ void main(void)
while(1);
}
- /* Set up MMU and caches */
- mmu_setup_by_mva(CONFIG_SYS_SDRAM_BASE, CONFIG_DRAM_SIZE_MB);
-
initialize_s5p_mshc();
graphics();