google/smaug: add new mainboard

This is an nvidia t210 based board.
This includes Chrome OS downstream up to Change-Id: Ic89ed54c.

Change-Id: I4d77659f4f2d21b1bbdcfc3467e1a166c02ddd47
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10635
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 52 insertions, 0 deletions

diff --git a/src/mainboard/google/smaug/Makefile.inc b/src/mainboard/google/smaug/Makefile.inc
new file mode 100644
index 0000000000..1e84d54cf7
--- /dev/null
+++ b/src/mainboard/google/smaug/Makefile.inc
@@ -0,0 +1,52 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2015 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc.
+##
+
+# Add a handler for BCT config files
+$(call add-special-class,bct-cfg)
+bct-cfg-handler= $(eval $(obj)/generated/bct.cfg: $(1)$(2))
+
+$(obj)/generated/bct.cfg:
+	@printf "    CAT        $(subst $(obj)/,,$(@))\n"
+	cat $^ > $@
+
+subdirs-y += bct
+
+bootblock-y += bootblock.c
+bootblock-y += pmic.c
+bootblock-y += reset.c
+
+verstage-y += chromeos.c
+verstage-y += reset.c
+
+romstage-y += chromeos.c
+romstage-y += pmic.c
+romstage-y += reset.c
+romstage-y += romstage.c
+romstage-y += sdram_configs.c
+
+ramstage-y += chromeos.c
+ramstage-y += boardid.c
+ramstage-y += mainboard.c
+ramstage-y += reset.c
+ramstage-y += pmic.c
+
+bootblock-y += memlayout.ld
+romstage-y += memlayout.ld
+ramstage-y += memlayout.ld
+verstage-y += memlayout.ld