diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-07-03 14:46:47 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-12 09:58:33 +0000 |
commit | 45f448f4a4e09b270d964c98d3aced2e73d9d6bc (patch) | |
tree | d217f38c8a28fbf1c449f17f243b73a7f23db6dd /src/mainboard/google/slippy | |
parent | c05c2b3fb25ca42a75ecc987178c298f7fe0ead5 (diff) |
haswell: Relocate `mainboard_romstage_entry` to northbridge
This is what sandybridge does, and if done properly allows factoring out
common settings. Said refactoring will be handled in subsequent commits.
Change-Id: I075eba1324a9e7cbd47e776b097eb940102ef4fe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43108
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'src/mainboard/google/slippy')
-rw-r--r-- | src/mainboard/google/slippy/romstage.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c index a24f5c4dcd..2231921ce1 100644 --- a/src/mainboard/google/slippy/romstage.c +++ b/src/mainboard/google/slippy/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/romstage.h> #include <cpu/intel/haswell/haswell.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> @@ -43,9 +42,9 @@ void mainboard_config_rcba(void) RCBA16(D23IR) = DIR_ROUTE(PIRQH, PIRQH, PIRQH, PIRQH); /* SDIO */ } -void mainboard_romstage_entry(void) +void mainboard_fill_pei_data(struct pei_data *pei_data) { - struct pei_data pei_data = { + struct pei_data mainboard_pei_data = { .pei_version = PEI_VERSION, .mchbar = (uintptr_t)DEFAULT_MCHBAR, .dmibar = (uintptr_t)DEFAULT_DMIBAR, @@ -73,8 +72,7 @@ void mainboard_romstage_entry(void) .usb_xhci_on_resume = 1, }; - variant_romstage_entry(&pei_data); + *pei_data = mainboard_pei_data; /* FIXME: Do not overwrite everything */ - /* Call into the real romstage main with this board's attributes. */ - romstage_common(&pei_data); + variant_romstage_entry(pei_data); } |