diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-05 22:02:26 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-12 11:23:00 +0000 |
| commit | 4bcc275d717c5c2ab926bc1ee2cb7122f58928e2 (patch) | |
| tree | 72da4446470d3221ce728b6f4f8db48dbf2ed1b8 /src/mainboard/google/slippy | |
| parent | 4cdac3c7b3e03d85377f039cbd6cc677bf91acd9 (diff) | |
mb/google,intel: Add ChromeOS GPIOs to onboard.h
Change-Id: Ia473596e3c9a75587cd1288c8816bfef66bef82e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59000
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google/slippy')
| -rw-r--r-- | src/mainboard/google/slippy/chromeos.c | 5 | ||||
| -rw-r--r-- | src/mainboard/google/slippy/onboard.h | 3 |
2 files changed, 6 insertions, 2 deletions
diff --git a/src/mainboard/google/slippy/chromeos.c b/src/mainboard/google/slippy/chromeos.c index 5453583e87..0fa78c921f 100644 --- a/src/mainboard/google/slippy/chromeos.c +++ b/src/mainboard/google/slippy/chromeos.c @@ -6,6 +6,7 @@ #include <southbridge/intel/common/gpio.h> #include <types.h> #include <vendorcode/google/chromeos/chromeos.h> +#include "onboard.h" void fill_lb_gpios(struct lb_gpios *gpios) { @@ -19,12 +20,12 @@ void fill_lb_gpios(struct lb_gpios *gpios) int get_write_protect_state(void) { - return get_gpio(58); + return get_gpio(GPIO_SPI_WP); } static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), - CROS_GPIO_WP_AH(58, CROS_GPIO_DEVICE_NAME), + CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; void mainboard_chromeos_acpi_generate(void) diff --git a/src/mainboard/google/slippy/onboard.h b/src/mainboard/google/slippy/onboard.h index 6b7fdb281e..a1f30fda08 100644 --- a/src/mainboard/google/slippy/onboard.h +++ b/src/mainboard/google/slippy/onboard.h @@ -23,4 +23,7 @@ #define PEPPY_BOARD_VERSION_PROTO 0 #define PEPPY_BOARD_VERSION_EVT 1 +/* Write protect is active high */ +#define GPIO_SPI_WP 58 + #endif |