diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-02-11 13:59:12 +0100 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2021-02-12 19:48:34 +0000 |
commit | a3c6ed0dffe144ca1803b43fe1e0e16a9136793e (patch) | |
tree | a8a8bb08065dc46bc3621819cf14414db389e70b /src/mainboard/google/slippy/variants/leon | |
parent | 33b59c9170a66a7f6d9c26ccf664714ea81d218d (diff) |
haswell boards: Correct USB config indentation
Change-Id: I72b717a41c5611cf578ce178722029b8646cbb35
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50539
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/slippy/variants/leon')
-rw-r--r-- | src/mainboard/google/slippy/variants/leon/romstage.c | 52 |
1 files changed, 26 insertions, 26 deletions
diff --git a/src/mainboard/google/slippy/variants/leon/romstage.c b/src/mainboard/google/slippy/variants/leon/romstage.c index daf0c16604..49961d93df 100644 --- a/src/mainboard/google/slippy/variants/leon/romstage.c +++ b/src/mainboard/google/slippy/variants/leon/romstage.c @@ -44,30 +44,30 @@ void copy_spd(struct pei_data *peid) spd_file + (spd_index * spd_len), spd_len); } - const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = { - /* Length, Enable, OCn#, Location */ - { 0x0040, 1, 0, /* P0: Port A, CN10 */ - USB_PORT_BACK_PANEL }, - { 0x0040, 1, 2, /* P1: Port B, CN11 */ - USB_PORT_BACK_PANEL }, - { 0x0080, 1, USB_OC_PIN_SKIP, /* P2: CCD */ - USB_PORT_INTERNAL }, - { 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */ - USB_PORT_MINI_PCIE }, - { 0x0080, 1, USB_OC_PIN_SKIP, /* P4: SD Card */ - USB_PORT_INTERNAL }, - { 0x0040, 1, USB_OC_PIN_SKIP, /* P5: LTE */ - USB_PORT_INTERNAL }, - { 0x0040, 1, USB_OC_PIN_SKIP, /* P6: SIM CARD */ - USB_PORT_FLEX }, - { 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */ - USB_PORT_SKIP }, - }; +const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = { + /* Length, Enable, OCn#, Location */ + { 0x0040, 1, 0, /* P0: Port A, CN10 */ + USB_PORT_BACK_PANEL }, + { 0x0040, 1, 2, /* P1: Port B, CN11 */ + USB_PORT_BACK_PANEL }, + { 0x0080, 1, USB_OC_PIN_SKIP, /* P2: CCD */ + USB_PORT_INTERNAL }, + { 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */ + USB_PORT_MINI_PCIE }, + { 0x0080, 1, USB_OC_PIN_SKIP, /* P4: SD Card */ + USB_PORT_INTERNAL }, + { 0x0040, 1, USB_OC_PIN_SKIP, /* P5: LTE */ + USB_PORT_INTERNAL }, + { 0x0040, 1, USB_OC_PIN_SKIP, /* P6: SIM CARD */ + USB_PORT_FLEX }, + { 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */ + USB_PORT_SKIP }, +}; - const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = { - /* Enable, OCn# */ - { 1, 0 }, /* P1; Port A, CN10 */ - { 1, 2 }, /* P2; Port B, CN11 */ - { 0, USB_OC_PIN_SKIP }, /* P3; */ - { 0, USB_OC_PIN_SKIP }, /* P4; */ - }; +const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = { + /* Enable, OCn# */ + { 1, 0 }, /* P1; Port A, CN10 */ + { 1, 2 }, /* P2; Port B, CN11 */ + { 0, USB_OC_PIN_SKIP }, /* P3; */ + { 0, USB_OC_PIN_SKIP }, /* P4; */ +}; |