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authorKarthikeyan Ramasubramanian <kramasub@google.com>2021-10-26 16:55:35 -0600
committerKarthik Ramasubramanian <kramasub@google.com>2021-10-27 23:22:53 +0000
commitb4182989d7f74e10633f136a3b176ddd803b2d8c (patch)
tree51e6a5523c1b910c85d15f00515c8ccae23e064e /src/mainboard/google/slippy/ec.c
parentd3c565e7452f24432ae2940a2e19c70fa2de8e83 (diff)
mb/google/guybrush: Move GSC_SOC_INT_L from GPIO_3 to GPIO_85
GSC_SOC_INT_L gpio is used by Google Security Chip (GSC) to interrupt SoC when the SoC is in S0 state. Hence use GPIO_85 which is in S0 domain and save the GPIO_3 in S5 domain for other use-cases. This move applies to all board except: * Guybrush * Nipperkin board version 1 Update the GPIO configuration, device tree configuration accordingly. BUG=b:202992077 TEST=Build and boot to OS in Guybrush and Nipperkin. Ensure that the SoC <-> TPM communication is working fine. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I019f10f2f457ab81bcff77ce8ca609b2b40cb2ea Reviewed-on: https://review.coreboot.org/c/coreboot/+/58638 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/google/slippy/ec.c')
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