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authorAaron Durbin <adurbin@chromium.org>2016-07-26 11:49:11 -0500
committerAaron Durbin <adurbin@chromium.org>2016-07-27 21:25:23 +0200
commitbc24b85e6a1ce040e3d9f505e188c686496b7e29 (patch)
treeae51c5a3da883f244e123edc8e110c38a9826b65 /src/mainboard/google/slippy/acpi
parent139314bffd5ff29847661c536130d8d8d3e261bf (diff)
mainboard/google/slippy: remove unobtainable mainboard
The slippy board was a proof of concept device that has never made it out in the wild. Moreover, I don't think any of these boards exist any longer. Change-Id: I24fb08d9be35b2367e7aa64520ce5778ab861535 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15902 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/slippy/acpi')
-rw-r--r--src/mainboard/google/slippy/acpi/chromeos.asl19
-rw-r--r--src/mainboard/google/slippy/acpi/ec.asl20
-rw-r--r--src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl82
-rw-r--r--src/mainboard/google/slippy/acpi/mainboard.asl105
-rw-r--r--src/mainboard/google/slippy/acpi/platform.asl82
-rw-r--r--src/mainboard/google/slippy/acpi/superio.asl25
-rw-r--r--src/mainboard/google/slippy/acpi/thermal.asl168
7 files changed, 0 insertions, 501 deletions
diff --git a/src/mainboard/google/slippy/acpi/chromeos.asl b/src/mainboard/google/slippy/acpi/chromeos.asl
deleted file mode 100644
index 673985fc25..0000000000
--- a/src/mainboard/google/slippy/acpi/chromeos.asl
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-Name(OIPG, Package() {
- Package () { 0x0001, 0, 0xFFFFFFFF, "LynxPoint" }, // no recovery button
- Package () { 0x0003, 1, 58, "LynxPoint" }, // firmware write protect
-})
diff --git a/src/mainboard/google/slippy/acpi/ec.asl b/src/mainboard/google/slippy/acpi/ec.asl
deleted file mode 100644
index 2b32392df2..0000000000
--- a/src/mainboard/google/slippy/acpi/ec.asl
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* mainboard configuration */
-#include <mainboard/google/slippy/ec.h>
-
-/* ACPI code for EC functions */
-#include <ec/google/chromeec/acpi/ec.asl>
diff --git a/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl b/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl
deleted file mode 100644
index 40658a9839..0000000000
--- a/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* This is board specific information: IRQ routing for IvyBridge */
-
-// PCI Interrupt Routing
-Method(_PRT)
-{
- If (PICM) {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, 0, 16 },
- // Mini-HD Audio 0:3.0
- Package() { 0x0003ffff, 0, 0, 16 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, 0, 22 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, 0, 16 },
- Package() { 0x001cffff, 1, 0, 17 },
- Package() { 0x001cffff, 2, 0, 18 },
- Package() { 0x001cffff, 3, 0, 19 },
- // EHCI 0:1d.0
- Package() { 0x001dffff, 0, 0, 19 },
- // XHCI 0:14.0
- Package() { 0x0014ffff, 0, 0, 18 },
- // LPC devices 0:1f.0
- Package() { 0x001fffff, 0, 0, 22 },
- Package() { 0x001fffff, 1, 0, 18 },
- Package() { 0x001fffff, 2, 0, 17 },
- Package() { 0x001fffff, 3, 0, 16 },
- // Serial IO 0:15.0
- Package() { 0x0015ffff, 0, 0, 20 },
- Package() { 0x0015ffff, 1, 0, 21 },
- Package() { 0x0015ffff, 2, 0, 21 },
- Package() { 0x0015ffff, 3, 0, 21 },
- // SDIO 0:17.0
- Package() { 0x0017ffff, 0, 0, 23 },
- })
- } Else {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // Mini-HD Audio 0:3.0
- Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
- // EHCI 0:1d.0
- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
- // XHCI 0:14.0
- Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
- // LPC device 0:1f.0
- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
- // Serial IO 0:15.0
- Package() { 0x0015ffff, 0, \_SB.PCI0.LPCB.LNKE, 0 },
- Package() { 0x0015ffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },
- Package() { 0x0015ffff, 2, \_SB.PCI0.LPCB.LNKF, 0 },
- Package() { 0x0015ffff, 3, \_SB.PCI0.LPCB.LNKF, 0 },
- // SDIO 0:17.0
- Package() { 0x0017ffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },
- })
- }
-}
diff --git a/src/mainboard/google/slippy/acpi/mainboard.asl b/src/mainboard/google/slippy/acpi/mainboard.asl
deleted file mode 100644
index 60d9a618ae..0000000000
--- a/src/mainboard/google/slippy/acpi/mainboard.asl
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <mainboard/google/slippy/onboard.h>
-
-Scope (\_SB)
-{
- Device (LID0)
- {
- Name(_HID, EisaId("PNP0C0D"))
- Method(_LID, 0)
- {
- Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
- Return (\LIDS)
- }
- }
-
- Device (PWRB)
- {
- Name(_HID, EisaId("PNP0C0C"))
- }
-
- Device (TPAD)
- {
- Name (_ADR, 0x0)
- Name (_UID, 1)
-
- // Report as a Sleep Button device so Linux will
- // automatically enable it as a wake source
- Name (_HID, EisaId("PNP0C0E"))
-
- Name (_CRS, ResourceTemplate()
- {
- Interrupt (ResourceConsumer, Edge, ActiveLow)
- {
- BOARD_TRACKPAD_IRQ
- }
-
- VendorShort (ADDR)
- {
- BOARD_TRACKPAD_I2C_ADDR
- }
- })
-
- Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 })
-
- Method (_DSW, 3, NotSerialized)
- {
- Store (BOARD_TRACKPAD_WAKE_GPIO, Local0)
-
- If (LEqual (Arg0, 1)) {
- // Enable GPIO as wake source
- \_SB.PCI0.LPCB.GWAK (Local0)
- }
- }
- }
-
- Device (TSCR)
- {
- Name (_ADR, 0x0)
- Name (_UID, 2)
-
- // Report as a Sleep Button device so Linux will
- // automatically enable it as a wake source
- Name (_HID, EisaId("PNP0C0E"))
-
- Name (_CRS, ResourceTemplate()
- {
- Interrupt (ResourceConsumer, Edge, ActiveLow)
- {
- BOARD_TOUCHSCREEN_IRQ
- }
-
- VendorShort (ADDR)
- {
- BOARD_TOUCHSCREEN_I2C_ADDR
- }
- })
-
- Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 })
-
- Method (_DSW, 3, NotSerialized)
- {
- Store (BOARD_TOUCHSCREEN_WAKE_GPIO, Local0)
-
- If (LEqual (Arg0, 1)) {
- // Enable GPIO as wake source
- \_SB.PCI0.LPCB.GWAK (Local0)
- }
- }
- }
-}
diff --git a/src/mainboard/google/slippy/acpi/platform.asl b/src/mainboard/google/slippy/acpi/platform.asl
deleted file mode 100644
index 1bd054da06..0000000000
--- a/src/mainboard/google/slippy/acpi/platform.asl
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* The APM port can be used for generating software SMIs */
-
-OperationRegion (APMP, SystemIO, 0xb2, 2)
-Field (APMP, ByteAcc, NoLock, Preserve)
-{
- APMC, 8, // APM command
- APMS, 8 // APM status
-}
-
-/* Port 80 POST */
-
-OperationRegion (POST, SystemIO, 0x80, 1)
-Field (POST, ByteAcc, Lock, Preserve)
-{
- DBG0, 8
-}
-
-/* SMI I/O Trap */
-Method(TRAP, 1, Serialized)
-{
- Store (Arg0, SMIF) // SMI Function
- Store (0, TRP0) // Generate trap
- Return (SMIF) // Return value of SMI handler
-}
-
-/* The _PIC method is called by the OS to choose between interrupt
- * routing via the i8259 interrupt controller or the APIC.
- *
- * _PIC is called with a parameter of 0 for i8259 configuration and
- * with a parameter of 1 for Local Apic/IOAPIC configuration.
- */
-
-Method(_PIC, 1)
-{
- // Remember the OS' IRQ routing choice.
- Store(Arg0, PICM)
-}
-
-/* The _PTS method (Prepare To Sleep) is called before the OS is
- * entering a sleep state. The sleep state number is passed in Arg0
- */
-
-Method(_PTS,1)
-{
-}
-
-/* The _WAK method is called on system wakeup */
-
-Method(_WAK,1)
-{
- /* Update AC status */
- Store (\_SB.PCI0.LPCB.EC0.ACEX, Local0)
- if (LNotEqual (Local0, \PWRS)) {
- Store (Local0, \PWRS)
- Notify (\_SB.PCI0.LPCB.EC0.AC, 0x80)
- }
-
- /* Update LID status */
- Store (\_SB.PCI0.LPCB.EC0.LIDS, Local0)
- if (LNotEqual (Local0, \LIDS)) {
- Store (Local0, \LIDS)
- Notify (\_SB.LID0, 0x80)
- }
-
- Return(Package(){0,0})
-}
diff --git a/src/mainboard/google/slippy/acpi/superio.asl b/src/mainboard/google/slippy/acpi/superio.asl
deleted file mode 100644
index ff0d53400a..0000000000
--- a/src/mainboard/google/slippy/acpi/superio.asl
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* mainboard configuration */
-#include <mainboard/google/slippy/ec.h>
-
-#define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources
-#define SIO_EC_HOST_ENABLE // EC Host Interface Resources
-#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard
-#define SIO_EC_ENABLE_COM1 // Enable Serial Port 1
-
-/* ACPI code for EC SuperIO functions */
-#include <ec/google/chromeec/acpi/superio.asl>
diff --git a/src/mainboard/google/slippy/acpi/thermal.asl b/src/mainboard/google/slippy/acpi/thermal.asl
deleted file mode 100644
index 0aae633cb7..0000000000
--- a/src/mainboard/google/slippy/acpi/thermal.asl
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-// Thermal Zone
-
-Scope (\_TZ)
-{
- ThermalZone (THRM)
- {
- Name (_TC1, 0x02)
- Name (_TC2, 0x05)
-
- // Thermal zone polling frequency: 10 seconds
- Name (_TZP, 100)
-
- // Thermal sampling period for passive cooling: 2 seconds
- Name (_TSP, 20)
-
- // Convert from Degrees C to 1/10 Kelvin for ACPI
- Method (CTOK, 1) {
- // 10th of Degrees C
- Multiply (Arg0, 10, Local0)
-
- // Convert to Kelvin
- Add (Local0, 2732, Local0)
-
- Return (Local0)
- }
-
- // Threshold for OS to shutdown
- Method (_CRT, 0, Serialized)
- {
- Return (CTOK (\TCRT))
- }
-
- // Threshold for passive cooling
- Method (_PSV, 0, Serialized)
- {
- Return (CTOK (\TPSV))
- }
-
- // Processors used for passive cooling
- Method (_PSL, 0, Serialized)
- {
- Return (\PPKG ())
- }
-
- Method (_TMP, 0, Serialized)
- {
- // Get Temperature from TIN# set in NVS
- Store (\_SB.PCI0.LPCB.EC0.TINS (TMPS), Local0)
-
- // Check for sensor not calibrated
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNCA)) {
- Return (CTOK(0))
- }
-
- // Check for sensor not present
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNPR)) {
- Return (CTOK(0))
- }
-
- // Check for sensor not powered
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNOP)) {
- Return (CTOK(0))
- }
-
- // Check for sensor bad reading
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TBAD)) {
- Return (CTOK(0))
- }
-
- // Adjust by offset to get Kelvin
- Add (\_SB.PCI0.LPCB.EC0.TOFS, Local0, Local0)
-
- // Convert to 1/10 Kelvin
- Multiply (Local0, 10, Local0)
- Return (Local0)
- }
-
- /* CTDP Down */
- Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
- Return (CTOK (\F0OF))
- } Else {
- Return (CTOK (\F0ON))
- }
- }
-
- /* CTDP Nominal */
- Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
- Return (CTOK (\F1OF))
- } Else {
- Return (CTOK (\F1ON))
- }
- }
-
- Name (_AL0, Package () { TDP0 })
- Name (_AL1, Package () { TDP1 })
-
- PowerResource (TNP0, 0, 0)
- {
- Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
- Return (One)
- } Else {
- Return (Zero)
- }
- }
- Method (_ON) {
- Store (0, \FLVL)
- \_SB.PCI0.MCHC.STND ()
- Notify (\_TZ.THRM, 0x81)
- }
- Method (_OFF) {
- Store (1, \FLVL)
- \_SB.PCI0.MCHC.STDN ()
- Notify (\_TZ.THRM, 0x81)
- }
- }
-
- PowerResource (TNP1, 0, 0)
- {
- Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
- Return (One)
- } Else {
- Return (Zero)
- }
- }
- Method (_ON) {
- Store (1, \FLVL)
- Notify (\_TZ.THRM, 0x81)
- }
- Method (_OFF) {
- Store (1, \FLVL)
- Notify (\_TZ.THRM, 0x81)
- }
- }
-
- Device (TDP0)
- {
- Name (_HID, EISAID ("PNP0C0B"))
- Name (_UID, 0)
- Name (_PR0, Package () { TNP0 })
- }
-
- Device (TDP1)
- {
- Name (_HID, EISAID ("PNP0C0B"))
- Name (_UID, 1)
- Name (_PR0, Package () { TNP1 })
- }
- }
-}