google/slippy: consolidate variants' common mainboard.asl code

Move code common code from each variant's mainboard.asl into
common ACPI code for all variants (like google/auron).  This also
adds the _PRW method for the LID0 device for falco and peppy, which
omitted the function  when they were originally upstreamed.

See Chromium commit c8b41f7, falco: Add _PRW for LID0 ACPI Device

Change-Id: I7f5129340249a986f5996af37c01ccbde8d374e8
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/18368
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 39 insertions, 0 deletions

diff --git a/src/mainboard/google/slippy/acpi/mainboard.asl b/src/mainboard/google/slippy/acpi/mainboard.asl
new file mode 100644
index 0000000000..35bc1b4ca5
--- /dev/null
+++ b/src/mainboard/google/slippy/acpi/mainboard.asl
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <onboard.h>
+
+Scope (\_SB)
+{
+	Device (LID0)
+	{
+		Name(_HID, EisaId("PNP0C0D"))
+		Method(_LID, 0)
+		{
+			Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
+			Return (\LIDS)
+		}
+
+		// There is no GPIO for LID, the EC pulses WAKE# pin instead.
+		// There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
+		Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
+	}
+
+	Device (PWRB)
+	{
+		Name(_HID, EisaId("PNP0C0C"))
+	}
+}
+
+#include <variant/acpi/mainboard.asl>