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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-11 16:47:54 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-12 18:32:56 +0000 |
| commit | 919801e5dc544194c767b70d8e3db7f09ecc2f37 (patch) | |
| tree | 813c95c8ca5e303e91607e9867a82b0c88b30aa3 /src/mainboard/google/sarien | |
| parent | c3d909dbb7562cb4c47f07e00961b4256c863895 (diff) | |
soc/amd/genoa/chipset.cb: add missing non-transparent PCI bridges
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I2d5efa948e8bd993ca4b5af80f664db687b8a766
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/sarien')
0 files changed, 0 insertions, 0 deletions