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authorSubrata Banik <subrata.banik@intel.com>2018-11-06 16:59:56 +0530
committerPatrick Georgi <pgeorgi@google.com>2018-11-07 16:41:49 +0000
commit69b18f0b6826ecfd794594b4ae5ebf299e9378ba (patch)
tree5659c9834831295b6d05a1fe1f3c05ad6e8f53b7 /src/mainboard/google/sarien
parent85376bfd9b018820e84fec92471d13717ad14083 (diff)
mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT generation
This changes uses drivers/intel/wifi chip for CNVi device to ensure that: 1. Correct device name shows in ACPI name space 2. Correct wake up shows in cat /proc/acpi/wakeup 3. Remove cnvi.asl from soc/intel/cannonlake Change-Id: Ic81de2dce6045ced913766790a40ed19119f5118 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/29399 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/sarien')
-rw-r--r--src/mainboard/google/sarien/variants/arcada/devicetree.cb4
-rw-r--r--src/mainboard/google/sarien/variants/sarien/devicetree.cb4
2 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index e3b9680db8..ee1cca09f0 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -110,6 +110,10 @@ chip soc/intel/cannonlake
device pci 12.6 off end # GSPI #2
device pci 14.0 on end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG)
+ chip drivers/intel/wifi
+ register "wake" = "PME_B0_EN_BIT"
+ device pci 14.3 on end # CNVi wifi
+ end
device pci 14.5 off end # SDCard
device pci 15.0 on end # I2C #0
device pci 15.1 on
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index 1360b3f6f8..b33c923ce3 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -110,6 +110,10 @@ chip soc/intel/cannonlake
device pci 12.6 off end # GSPI #2
device pci 14.0 on end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG)
+ chip drivers/intel/wifi
+ register "wake" = "PME_B0_EN_BIT"
+ device pci 14.3 on end # CNVi wifi
+ end
device pci 14.5 off end # SDCard
device pci 15.0 on end # I2C #0
device pci 15.1 on