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authorDuncan Laurie <dlaurie@chromium.org>2014-08-22 13:36:12 -0700
committerMarc Jones <marc.jones@se-eng.com>2015-03-27 06:19:45 +0100
commitbe19c54585e4515811068370fa17ce8f4ea2a2bb (patch)
tree58e0ad4ac1513b2ecfeadac21518d151667f7661 /src/mainboard/google/samus/acpi
parent63dc01b76ec69520fa9becb05b91cfb4d86f9469 (diff)
samus: Updates for EVT board
- Remove NFC GPIOs - Change EC wake to GPIO27 - Enable wake on HOTWORD_DET_L_3V3 - Add new Hynix memory SKU BUG=chrome-os-partner:31549 BRANCH=none TEST=emerge-samus coreboot, cannot fully test until EVT Original-Change-Id: Ia25fc39f0b67c53305b3fd9150117d6a7867eb3a Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/213796 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 740ac0bb7eaa9ae35fce8a04825f9c5ecf7cab79) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I2b1c194eae2ebc53291f078c00ba04f82e10b0c1 Reviewed-on: http://review.coreboot.org/8963 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/mainboard/google/samus/acpi')
-rw-r--r--src/mainboard/google/samus/acpi/mainboard.asl28
1 files changed, 25 insertions, 3 deletions
diff --git a/src/mainboard/google/samus/acpi/mainboard.asl b/src/mainboard/google/samus/acpi/mainboard.asl
index 8d5ecc6b30..45a0c64b19 100644
--- a/src/mainboard/google/samus/acpi/mainboard.asl
+++ b/src/mainboard/google/samus/acpi/mainboard.asl
@@ -27,9 +27,8 @@ Scope (\_SB)
Return (\_SB.PCI0.LPCB.EC0.LIDS)
}
- // There is no GPIO for LID, the EC pulses WAKE# pin instead.
- // There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
- Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
+ // EC wake is GPIO27 which is a special DeepSX wake pin
+ Name (_PRW, Package(){ 0x70, 5 }) // GP27_EN
}
Device (PWRB)
@@ -189,6 +188,29 @@ Scope (\_SB.PCI0.I2C0)
}
}
}
+
+ Device (HOTW)
+ {
+ Name (_HID, "PNP0A05")
+ Name (_DDN, "Hotword Wake")
+ Name (_UID, 1)
+ Name (GPIO, 46) /* HOTWORD_DET_L_3V3 */
+
+ Name (_PRW, Package() { GPIO, 3 })
+
+ Method (_DSW, 3, NotSerialized)
+ {
+ If (LEqual (Arg0, 1)) {
+ // Enable GPIO as wake source
+ \_SB.PCI0.LPCB.GPIO.GWAK (^GPIO)
+ }
+ }
+
+ Method (_STA)
+ {
+ Return (0xF)
+ }
+ }
}
Scope (\_SB.PCI0.I2C1)