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authorJulius Werner <jwerner@chromium.org>2014-10-20 13:25:21 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-08 09:26:14 +0200
commit96195eeb71545b070e37413bfad1520ceca3da54 (patch)
tree4de9b88caa9bb4fd0150aed5df1cee89a82a2a52 /src/mainboard/google/rush_ryu
parentdae15a63e426230117b575f9acc504110748e98f (diff)
tegra132: Change all SoC headers to <soc/headername.h> system
This patch aligns tegra132 to the new SoC header include scheme. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Tested with whole series. Compiled Rush_Ryu. Change-Id: I5cdf4008a65db84f15c937ef53aab5e4d3ef24c4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d5c5c63d7b6399d3eb8a211b15d47829fe93a591 Original-Change-Id: Ifafd4d42d4fb04a1c37e8a5f23877c2b550cf44c Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224505 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9369 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rush_ryu')
-rw-r--r--src/mainboard/google/rush_ryu/boardid.c4
-rw-r--r--src/mainboard/google/rush_ryu/bootblock.c4
-rw-r--r--src/mainboard/google/rush_ryu/chromeos.c1
-rw-r--r--src/mainboard/google/rush_ryu/gpio.h2
-rw-r--r--src/mainboard/google/rush_ryu/mainboard.c7
-rw-r--r--src/mainboard/google/rush_ryu/memlayout.ld2
-rw-r--r--src/mainboard/google/rush_ryu/pmic.c1
-rw-r--r--src/mainboard/google/rush_ryu/reset.c1
-rw-r--r--src/mainboard/google/rush_ryu/romstage.c3
9 files changed, 14 insertions, 11 deletions
diff --git a/src/mainboard/google/rush_ryu/boardid.c b/src/mainboard/google/rush_ryu/boardid.c
index 1aa7c16831..9d99b90ddc 100644
--- a/src/mainboard/google/rush_ryu/boardid.c
+++ b/src/mainboard/google/rush_ryu/boardid.c
@@ -17,11 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <boardid.h>
#include <console/console.h>
-#include <soc/nvidia/tegra132/gpio.h>
+#include <soc/gpio.h>
#include <stdlib.h>
-#include <boardid.h>
#include "gpio.h"
/*
diff --git a/src/mainboard/google/rush_ryu/bootblock.c b/src/mainboard/google/rush_ryu/bootblock.c
index 9a1c68bb96..898bb3fdfe 100644
--- a/src/mainboard/google/rush_ryu/bootblock.c
+++ b/src/mainboard/google/rush_ryu/bootblock.c
@@ -22,11 +22,11 @@
#include <device/i2c.h>
#include <soc/addressmap.h>
#include <soc/bootblock.h>
+#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/funitcfg.h>
-#include <soc/padconfig.h>
#include <soc/nvidia/tegra/i2c.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
+#include <soc/padconfig.h>
#include "pmic.h"
diff --git a/src/mainboard/google/rush_ryu/chromeos.c b/src/mainboard/google/rush_ryu/chromeos.c
index 9c9056eb96..521fe59372 100644
--- a/src/mainboard/google/rush_ryu/chromeos.c
+++ b/src/mainboard/google/rush_ryu/chromeos.c
@@ -23,6 +23,7 @@
#include <ec/google/chromeec/ec_commands.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
+
#include "gpio.h"
void fill_lb_gpios(struct lb_gpios *gpios)
diff --git a/src/mainboard/google/rush_ryu/gpio.h b/src/mainboard/google/rush_ryu/gpio.h
index f790e8f2be..9c67420ff0 100644
--- a/src/mainboard/google/rush_ryu/gpio.h
+++ b/src/mainboard/google/rush_ryu/gpio.h
@@ -20,7 +20,7 @@
#ifndef __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
#define __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
-#include <soc/nvidia/tegra132/gpio.h>
+#include <soc/gpio.h>
/* Board ID definitions. */
enum {
diff --git a/src/mainboard/google/rush_ryu/mainboard.c b/src/mainboard/google/rush_ryu/mainboard.c
index e19ad02612..1af7e221cd 100644
--- a/src/mainboard/google/rush_ryu/mainboard.c
+++ b/src/mainboard/google/rush_ryu/mainboard.c
@@ -18,16 +18,15 @@
*/
#include <arch/mmu.h>
-#include <device/device.h>
#include <boot/coreboot_tables.h>
+#include <device/device.h>
#include <memrange.h>
-
#include <soc/addressmap.h>
+#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/funitcfg.h>
-#include <soc/padconfig.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
#include <soc/nvidia/tegra/i2c.h>
+#include <soc/padconfig.h>
static const struct pad_config mmcpads[] = {
/* MMC4 (eMMC) */
diff --git a/src/mainboard/google/rush_ryu/memlayout.ld b/src/mainboard/google/rush_ryu/memlayout.ld
index b9def51e74..ead7f47838 100644
--- a/src/mainboard/google/rush_ryu/memlayout.ld
+++ b/src/mainboard/google/rush_ryu/memlayout.ld
@@ -1 +1 @@
-#include <soc/nvidia/tegra132/memlayout.ld>
+#include <soc/memlayout.ld>
diff --git a/src/mainboard/google/rush_ryu/pmic.c b/src/mainboard/google/rush_ryu/pmic.c
index 85cc6e2f5b..a816e8ac14 100644
--- a/src/mainboard/google/rush_ryu/pmic.c
+++ b/src/mainboard/google/rush_ryu/pmic.c
@@ -23,6 +23,7 @@
#include <device/i2c.h>
#include <stdint.h>
#include <stdlib.h>
+
#include "pmic.h"
#include "reset.h"
diff --git a/src/mainboard/google/rush_ryu/reset.c b/src/mainboard/google/rush_ryu/reset.c
index 4548837d7e..7ccb2de28b 100644
--- a/src/mainboard/google/rush_ryu/reset.c
+++ b/src/mainboard/google/rush_ryu/reset.c
@@ -19,6 +19,7 @@
#include <arch/io.h>
#include <reset.h>
+
#include "gpio.h"
void hard_reset(void)
diff --git a/src/mainboard/google/rush_ryu/romstage.c b/src/mainboard/google/rush_ryu/romstage.c
index 5d195a6fcb..41c9149be4 100644
--- a/src/mainboard/google/rush_ryu/romstage.c
+++ b/src/mainboard/google/rush_ryu/romstage.c
@@ -21,9 +21,10 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/funitcfg.h>
-#include <soc/padconfig.h>
#include <soc/nvidia/tegra/i2c.h>
+#include <soc/padconfig.h>
#include <soc/romstage.h>
+
#include "gpio.h"
#include "pmic.h"