diff options
| author | Tom Warren <twarren@nvidia.com> | 2014-09-16 17:10:22 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-28 07:05:38 +0100 |
| commit | 554192870297b1123c44ef068e9e305f81e253d0 (patch) | |
| tree | f5a52e14e62fe25b18d18944973647035ff74ebe /src/mainboard/google/rush_ryu | |
| parent | b241f57de543a5837ed12889dd1cc417de705967 (diff) | |
Ryu: Rewrite I2C6 mux init
Do the absolute minimum needed to allow the DPAUX mux ctl write
for I2C6. This leaves HOST1X off (reset and clock disabled) to
avoid a conflict with any kernel display driver init.
I2C6 init/enable will be moved to ramstage in the next CL.
BUG=chrome-os-partner:31820
BRANCH=none
TEST=Dumped Speaker Driver (AD SSM4567) regs on Ryu, looks good.
Change-Id: I42106778a26c5a1d1483cc308b8314599c391539
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 24a9ebfda31c620b24e5c765dc950b87e3e5587b
Original-Change-Id: I0760222f1d7ccee207ae9871aeed3e2ddbca3dca
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/218900
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9093
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rush_ryu')
| -rw-r--r-- | src/mainboard/google/rush_ryu/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/rush_ryu/romstage.c b/src/mainboard/google/rush_ryu/romstage.c index 81de2cb494..ab5b2a8e29 100644 --- a/src/mainboard/google/rush_ryu/romstage.c +++ b/src/mainboard/google/rush_ryu/romstage.c @@ -24,7 +24,6 @@ #include <soc/padconfig.h> #include <soc/nvidia/tegra/i2c.h> #include <soc/romstage.h> - #include "gpio.h" #include "pmic.h" @@ -93,6 +92,7 @@ void romstage_mainboard_init(void) /* Bring up controller interfaces for ramstage loading. */ soc_configure_funits(funits, ARRAY_SIZE(funits)); soc_configure_pads(padcfgs, ARRAY_SIZE(padcfgs)); + soc_configure_i2c6pad(); /* TPM */ i2c_init(I2C3_BUS); |