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authorMatt DeVillier <matt.devillier@gmail.com>2015-12-25 01:36:40 -0600
committerMartin Roth <martinroth@google.com>2016-06-16 01:43:42 +0200
commitf09d39db4ed3be7a0d4e452e3564c34e064a437a (patch)
tree889dcf8c880e8067cc5555cf3e36f6edf9eafe2e /src/mainboard/google/rikku/mainboard.c
parent1f40ae2d746ec9a85770538a2e21620934331bd9 (diff)
google/rikku: Upstream Acer Chromebox CXI2
Migrate google/rikku (Acer Chromebox CXI2) from Chromium tree to upstream, using google/guado as a baseline. original source: branch firmware-rikku-6301.110.B commit 2e71207 [CHERRY-PICK: broadwell: Update to microcode 0x1F] TEST=built and booted Linux on rikku with full functionality blobs required for working image: VGA BIOS (vgabios.bin) firmware descriptor (ifd.bin) Intel ME firmware (me.bin) MRC (mrc.bin) external reference code (refcode.elf) Change-Id: Iba618a0b2cf2d613f6429b3e7606e0b47fa97a4d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/12802 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/rikku/mainboard.c')
-rw-r--r--src/mainboard/google/rikku/mainboard.c54
1 files changed, 54 insertions, 0 deletions
diff --git a/src/mainboard/google/rikku/mainboard.c b/src/mainboard/google/rikku/mainboard.c
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+++ b/src/mainboard/google/rikku/mainboard.c
@@ -0,0 +1,54 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <types.h>
+#include <string.h>
+#include <smbios.h>
+#include <device/device.h>
+#include <device/device.h>
+#include <device/pci_def.h>
+#include <device/pci_ops.h>
+#include <console/console.h>
+#include <pc80/mc146818rtc.h>
+#include <arch/acpi.h>
+#include <arch/io.h>
+#include <arch/interrupt.h>
+#include <boot/coreboot_tables.h>
+#include "onboard.h"
+
+void mainboard_suspend_resume(void)
+{
+ /* Call SMM finalize() handlers before resume */
+ outb(0xcb, 0xb2);
+}
+
+static void mainboard_init(device_t dev)
+{
+ lan_init();
+}
+
+// mainboard_enable is executed as first thing after
+// enumerate_buses().
+
+static void mainboard_enable(device_t dev)
+{
+ dev->ops->init = mainboard_init;
+}
+
+struct chip_operations mainboard_ops = {
+ .enable_dev = mainboard_enable,
+};
+