diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2015-12-25 01:36:40 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-06-16 01:43:42 +0200 |
| commit | f09d39db4ed3be7a0d4e452e3564c34e064a437a (patch) | |
| tree | 889dcf8c880e8067cc5555cf3e36f6edf9eafe2e /src/mainboard/google/rikku/chromeos.fmd | |
| parent | 1f40ae2d746ec9a85770538a2e21620934331bd9 (diff) | |
google/rikku: Upstream Acer Chromebox CXI2
Migrate google/rikku (Acer Chromebox CXI2) from Chromium tree to
upstream, using google/guado as a baseline.
original source:
branch firmware-rikku-6301.110.B
commit 2e71207 [CHERRY-PICK: broadwell: Update to microcode 0x1F]
TEST=built and booted Linux on rikku with full functionality
blobs required for working image:
VGA BIOS (vgabios.bin)
firmware descriptor (ifd.bin)
Intel ME firmware (me.bin)
MRC (mrc.bin)
external reference code (refcode.elf)
Change-Id: Iba618a0b2cf2d613f6429b3e7606e0b47fa97a4d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/12802
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/rikku/chromeos.fmd')
| -rw-r--r-- | src/mainboard/google/rikku/chromeos.fmd | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/src/mainboard/google/rikku/chromeos.fmd b/src/mainboard/google/rikku/chromeos.fmd new file mode 100644 index 0000000000..113fba6e6f --- /dev/null +++ b/src/mainboard/google/rikku/chromeos.fmd @@ -0,0 +1,38 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x200000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x1ff000 + } + SI_BIOS@0x200000 0x600000 { + RW_SECTION_A@0x0 0xf0000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0xdffc0 + RW_FWID_A@0xeffc0 0x40 + } + RW_SECTION_B@0xf0000 0xf0000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0xdffc0 + RW_FWID_B@0xeffc0 0x40 + } + RW_MRC_CACHE@0x1e0000 0x10000 + RW_ELOG@0x1f0000 0x4000 + RW_SHARED@0x1f4000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x1f8000 0x2000 + RW_UNUSED@0x1fa000 0x6000 + RW_LEGACY(CBFS)@0x200000 0x200000 + WP_RO@0x400000 0x200000 { + RO_VPD@0x0 0x4000 + RO_UNUSED@0x4000 0xc000 + RO_SECTION@0x10000 0x1f0000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x100000 + } + } + } +} |