diff options
| author | Tarun Tuli <taruntuli@google.com> | 2022-08-04 09:27:16 -0400 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-08-07 19:43:20 +0000 |
| commit | 1c718519f468d8107b92d0a9ac540092ed08b1ea (patch) | |
| tree | 2d5001f66dd58e145c745ad3798fcb7d3a4ef262 /src/mainboard/google/rex | |
| parent | 513d359dad3a99c13846f4e97b372ec98d245695 (diff) | |
mb/google/rex: Remove depedency on board id for early GPIO config
This adds a default early GPIO table in the case of us not being
able to identify a valid board ID.
Primarily, this is useful in the case of EC issues to ensure
that debug interfaces (e.g. UART) are always up and available.
BUG=b:238165977
TEST=Boots and no errors on simics
Signed-off-by: Tarun Tuli <taruntuli@google.com>
Change-Id: I135dc6c29bc23195afe5c78eb79992691652d9e4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66394
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/rex')
| -rw-r--r-- | src/mainboard/google/rex/variants/rex0/gpio.c | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/src/mainboard/google/rex/variants/rex0/gpio.c b/src/mainboard/google/rex/variants/rex0/gpio.c index 8ed1127a92..67759519b8 100644 --- a/src/mainboard/google/rex/variants/rex0/gpio.c +++ b/src/mainboard/google/rex/variants/rex0/gpio.c @@ -362,8 +362,6 @@ static const struct pad_config gpio_table_id0[] = { /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table_id0[] = { - /* TODO: Verify all early config in place */ - /* GPP_B18 : [] ==> SOC_I2C_TPM_SDA */ PAD_CFG_NF(GPP_B18, NONE, DEEP, NF2), /* GPP_B19 : [] ==> SOC_I2C_TPM_SCL */ @@ -390,6 +388,19 @@ static const struct pad_config early_gpio_table_id0[] = { PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_H10, NONE, LOCK_CONFIG), }; +/* Default/Minimal early pad configuration if we can't find board_id */ +static const struct pad_config default_early_gpio_table[] = { + /* GPP_B18 : [] ==> SOC_I2C_TPM_SDA */ + PAD_CFG_NF(GPP_B18, NONE, DEEP, NF2), + /* GPP_B19 : [] ==> SOC_I2C_TPM_SCL */ + PAD_CFG_NF(GPP_B19, NONE, DEEP, NF2), + + /* GPP_H08 : [] ==> UART_DBG_TX_SOC_RX_R */ + PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1), + /* GPP_H09 : [] ==> UART_SOC_TX_DBG_RX_R */ + PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1), +}; + static const struct pad_config romstage_gpio_table_id0[] = { /* A20 : [] ==> SSD_PERST_L */ PAD_CFG_GPO(GPP_A20, 0, DEEP), @@ -421,9 +432,9 @@ const struct pad_config *variant_early_gpio_table(size_t *num) case BOARD_ID_UNKNOWN: default: - printk(BIOS_ERR, "board_id() not found. Unable to load early gpio table.\n"); - *num = 0; - return NULL; + printk(BIOS_ERR, "board_id() not found. Loading default early gpio table.\n"); + *num = ARRAY_SIZE(default_early_gpio_table); + return default_early_gpio_table; } } |