summaryrefslogtreecommitdiff
path: root/src/mainboard/google/rex
diff options
context:
space:
mode:
authorTyler Wang <tyler.wang@quanta.corp-partner.google.com>2023-08-28 19:11:23 +0800
committerSubrata Banik <subratabanik@google.com>2023-08-30 09:12:33 +0000
commit065e2e4a46a456d5457d010a0cfbf025a238518b (patch)
tree94de98c9d0c42a4315ffa3f93e9124883ccbc5be /src/mainboard/google/rex
parent92b6c3cc1f2a4ea47b01b9661e125434dd6114b9 (diff)
mb/google/rex/var/karis: Remove SAR sensor
According to the schematic, karis does not have a SAR sensor. Update GPIO settings. BUG=b:294155897 TEST=emerge-rex coreboot Change-Id: Ib3b66b9594f2d0fddbbfc56e99f06b6587487f2a Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77512 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/rex')
-rw-r--r--src/mainboard/google/rex/variants/karis/gpio.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/rex/variants/karis/gpio.c b/src/mainboard/google/rex/variants/karis/gpio.c
index 70d9f4925b..ad31c2744b 100644
--- a/src/mainboard/google/rex/variants/karis/gpio.c
+++ b/src/mainboard/google/rex/variants/karis/gpio.c
@@ -187,8 +187,8 @@ static const struct pad_config gpio_table[] = {
/* GPP_D23 : net NC is not present in the given design */
PAD_NC(GPP_D23, NONE),
- /* GPP_E00 : [] ==> SAR1_INT_L */
- PAD_CFG_GPI_APIC(GPP_E00, NONE, PLTRST, LEVEL, NONE),
+ /* GPP_E00 : NC net. */
+ PAD_NC(GPP_E00, NONE),
/* GPP_E01 : MEM_STRAP_2 ==> Component NC */
PAD_CFG_GPI_LOCK(GPP_E01, NONE, LOCK_CONFIG),
/* GPP_E02 : MEM_STRAP_1 ==> Component NC */
@@ -203,8 +203,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_E06, NONE),
/* GPP_E07 : NC pad. */
PAD_NC(GPP_E07, NONE),
- /* GPP_E08 : [] ==> SAR2_INT_L */
- PAD_CFG_GPI_APIC_LOCK(GPP_E08, NONE, LEVEL, NONE, LOCK_CONFIG),
+ /* GPP_E08 : NC net. */
+ PAD_NC(GPP_E08, NONE),
/* GPP_E09 : Not Connected */
PAD_NC(GPP_E09, NONE),
/* GPP_E10 : [] ==> SOC_FPMCU_INT_L */