diff options
author | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-05-24 10:01:49 +0800 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2022-07-01 07:23:45 +0000 |
commit | 7c304f8d3433b88969cd9ccd7fa6149e5030f8e7 (patch) | |
tree | e5918d0c70c0dfca7f28967137b34c90b2be2874 /src/mainboard/google/rex/dsdt.asl | |
parent | 7a294be356b44b5569682e652271f2aaddee91a3 (diff) |
mb/google/rex: Enable EC
Perform EC initialization in bootblock and ramstages. Add associated
ACPI configuration.
BUG=b:224325352
TEST=util/abuild/abuild -p none -t google/rex -a -c max
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I2ea934f32b34bc43650e20dd2736f4e652004dc2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64622
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rex/dsdt.asl')
-rw-r--r-- | src/mainboard/google/rex/dsdt.asl | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/dsdt.asl b/src/mainboard/google/rex/dsdt.asl index cecfe521fa..c967f5a3ff 100644 --- a/src/mainboard/google/rex/dsdt.asl +++ b/src/mainboard/google/rex/dsdt.asl @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <acpi/acpi.h> +#include <variant/ec.h> DefinitionBlock( "dsdt.aml", @@ -31,4 +32,13 @@ DefinitionBlock( /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> + + /* Chrome OS Embedded Controller */ + Scope (\_SB.PCI0.LPCB) + { + /* ACPI code for EC SuperIO functions */ + #include <ec/google/chromeec/acpi/superio.asl> + /* ACPI code for EC functions */ + #include <ec/google/chromeec/acpi/ec.asl> + } } |