diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-07-27 12:17:51 -0600 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-07-28 20:02:53 +0000 |
| commit | 460fea65239db16efd4777b3d28f661b906ff469 (patch) | |
| tree | cf817715d7cad8cd40402dc41eea987b3d9f6495 /src/mainboard/google/rex/dsdt.asl | |
| parent | 86b517f88edf1032cdc8f0b0df7ddad36151da50 (diff) | |
mb/google/brya/var/agah: Modify GPP_A8 programming
The EEs noticed this pin was misbehaving; it was accidentally set to a
low output, but should be open-drain (NC). This patch fixes that.
BUG=b:237837108
TEST=verified by EEs
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ie76a951320c49b9fbc1f23b96f04c9f86ad44d42
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66204
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/rex/dsdt.asl')
0 files changed, 0 insertions, 0 deletions