diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-10-11 00:44:06 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2014-02-16 20:37:03 +0100 |
| commit | 9d9d7f04296e2c6de5bd10ee4bff1a496006f9e1 (patch) | |
| tree | 2042e72caa55e408d5ab23f232449d9b744b1040 /src/mainboard/google/rambi/romstage.c | |
| parent | 6f6a249a75927476ba5e06bb2b0a0138e0cf63ea (diff) | |
baytrail: fix tsc rate
Despite some references to a fixed bclk in some of the
docs the bclk is variable per sku. Therefore, perform
the calculation according to the BSEL_CR_OVERCLOCK_CONTROL
msr which provides the bclk for the cpu cores in Bay Trail.
BUG=chrome-os-partner:23166
BRANCH=None
TEST=Built and booted B3. correctly says: clocks_per_usec: 2133
Change-Id: I55da45d42e7672fdb3b821c8aed7340a6f73dd08
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172771
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4883
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/google/rambi/romstage.c')
0 files changed, 0 insertions, 0 deletions