diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2014-01-13 16:37:51 -0800 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-15 05:06:38 +0200 |
| commit | 469b5205c31eeb7f58e66aaec58ef824f2e090a5 (patch) | |
| tree | f762a842693b8713888e2f3dd9c5b265ebeedd9b /src/mainboard/google/rambi/irqroute.h | |
| parent | 59d1d87c86ff26142de23fd372fece3977a7330c (diff) | |
rambi: Add ACPI devices and interrupts for codec and ALS
The Codec and ALS both have interrupt sources that can be configured.
The ALS kernel driver currently does not try to use it but the codec
driver does for things like jack detect.
ACPI Devices are added, but as with other ACPI devices the HID may
need to be updated once more official strings are decided.
BUG=chrome-os-partner:24380
BRANCH=baytrail
TEST=manual: build and boot on rambi and check for functional lightsensor
Change-Id: Ib51a2aaf32d5597926fcbe9183947e9ac53e1468
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182366
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5049
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/google/rambi/irqroute.h')
| -rw-r--r-- | src/mainboard/google/rambi/irqroute.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/rambi/irqroute.h b/src/mainboard/google/rambi/irqroute.h index 3e1d1a9428..733979381e 100644 --- a/src/mainboard/google/rambi/irqroute.h +++ b/src/mainboard/google/rambi/irqroute.h @@ -50,7 +50,14 @@ #define TPAD_IRQ_OFFSET 0 #define TOUCH_IRQ_OFFSET 1 #define I8042_IRQ_OFFSET 2 +#define ALS_IRQ_OFFSET 3 /* Corresponding SCORE GPIO pins */ #define TPAD_IRQ_GPIO 55 #define TOUCH_IRQ_GPIO 72 #define I8042_IRQ_GPIO 101 +#define ALS_IRQ_GPIO 70 + +/* SUS bank DIRQs - up to 16 supported */ +#define CODEC_IRQ_OFFSET 0 +/* Corresponding SUS GPIO pins */ +#define CODEC_IRQ_GPIO 9 |