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authorFelix Held <felix-coreboot@felixheld.de>2020-08-28 02:12:52 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-08-31 06:42:56 +0000
commitd555d6a88cf733f9f5a0a24694691a6901a81c73 (patch)
treeb39cc00553b2ebd9bb7d3ef72a9462c351a3a61d /src/mainboard/google/rambi/cmos.layout
parent764b987a6f93a64f18b1557e1591fc2afe47110c (diff)
mb/google/zork/dalboz: move PCIe GPP clock setting to devicetree
BUG=b:149970243 BRANCH=zork Change-Id: I0b31466c5a991b02cef3432942f8de45805fe546 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44891 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rambi/cmos.layout')
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