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author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2024-08-05 15:37:50 -0700 |
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committer | Subrata Banik <subratabanik@google.com> | 2024-09-18 02:17:15 +0000 |
commit | c43b19ff38c44a4211d314e7d24cceb6cbbf07df (patch) | |
tree | 50df6c583d723c222a848737534e5acca18a1d0c /src/mainboard/google/puff | |
parent | c512585e55d3ba998c9e2b6ffc6899642e2c297c (diff) |
soc/intel/ptl: Add SoC ACPI directory for Panther Lake
List of changes:
1. Select common ACPI Kconfig to include common ACPI code block
from IA-common code
2. Select ACPI Kconfig support for wake-up from sleep states.
3. Add SoC ASL code for SoC IPs like IPU, HDA etc.
4. PTL replaces DMI3 with SAF to ensure
common/block/acpi/acpi/northbridge.asl binding with PTL change,
#if DMI_BASE_SIZE guard check is added in northbridge.asl
5. include GPIO ASL that supports new pinctrl schema.
BUG=b:348678529
TEST=Verified on IntelĀ® SimicsĀ® Pre Silicon Simulation platform
for PTL using google/fatcat mainboard.
Change-Id: Ia5cf899b049cb8eb27b4ea30c7f3ce7a14884f15
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83772
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/puff')
0 files changed, 0 insertions, 0 deletions