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authorFelix Singer <felixsinger@posteo.net>2020-07-25 08:40:15 +0200
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-07-29 20:47:56 +0000
commitffe90c528b0487ce47a123ae905be8823c5615ae (patch)
tree9d011606a5318d5d1da7a014cbc92dcf85ecc6ea /src/mainboard/google/poppy
parent57c8143350bf357dd7edc13ddf735084eea53d07 (diff)
soc/intel/skylake: Enable SMBus depending on devicetree configuration
Currently SMBus gets enabled by the option SmbusEnable, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement of the SMBus controller. I checked all corresponding mainboards if the devicetree configuration matches the SmbusEnable setting. Change-Id: I0d9ec1888c82cc6d5ef86d0694269c885ba62c41 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43845 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src/mainboard/google/poppy')
-rw-r--r--src/mainboard/google/poppy/variants/atlas/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/baseboard/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/nami/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/nautilus/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/nocturne/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/rammus/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/soraka/devicetree.cb1
7 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
index 7c4928d47e..4af8c42958 100644
--- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
@@ -50,7 +50,6 @@ chip soc/intel/skylake
register "IoBufferOwnership" = "3"
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
- register "SmbusEnable" = "1"
register "Cio2Enable" = "1"
register "SaImguEnable" = "1"
register "ScsEmmcEnabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index 7bbddbdf3a..bed537bdb6 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -40,7 +40,6 @@ chip soc/intel/skylake
register "IoBufferOwnership" = "3"
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
- register "SmbusEnable" = "1"
register "Cio2Enable" = "1"
register "SaImguEnable" = "1"
register "ScsEmmcEnabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index e9514e0bca..e9f8b1d8a5 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -39,7 +39,6 @@ chip soc/intel/skylake
register "IoBufferOwnership" = "3"
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
- register "SmbusEnable" = "1"
register "Cio2Enable" = "0"
register "SaImguEnable" = "0"
register "ScsEmmcEnabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index e9d7dea3c2..de14503a88 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -40,7 +40,6 @@ chip soc/intel/skylake
register "IoBufferOwnership" = "3"
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
- register "SmbusEnable" = "1"
register "Cio2Enable" = "1"
register "SaImguEnable" = "1"
register "ScsEmmcEnabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
index a5c905eed9..24ee14c3d1 100644
--- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
@@ -45,7 +45,6 @@ chip soc/intel/skylake
register "IoBufferOwnership" = "3"
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
- register "SmbusEnable" = "1"
register "Cio2Enable" = "1"
register "SaImguEnable" = "1"
register "ScsEmmcEnabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
index 32429f9ced..3b9c76168f 100644
--- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
@@ -50,7 +50,6 @@ chip soc/intel/skylake
register "IoBufferOwnership" = "3"
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
- register "SmbusEnable" = "1"
register "Cio2Enable" = "0"
register "SaImguEnable" = "0"
register "ScsEmmcEnabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
index 2970a2e430..eb3cff351c 100644
--- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
@@ -40,7 +40,6 @@ chip soc/intel/skylake
register "IoBufferOwnership" = "3"
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
- register "SmbusEnable" = "1"
register "Cio2Enable" = "1"
register "SaImguEnable" = "1"
register "ScsEmmcEnabled" = "1"