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authorCaveh Jalali <caveh@chromium.org>2018-09-07 17:39:01 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-09-16 08:34:34 +0000
commit6f7db0710281466866604a7cfc7d68df94d82ada (patch)
tree6416fa9cc963ce06420699382c86a94c0534b044 /src/mainboard/google/poppy
parentf47682e586c093c896856d318bc3806d2cdad66d (diff)
mb/google/poppy: Set UPD CmdTriStateDis for Atlas
This patch sets the MRC UPD CmdTriStateDis for the atlas boards. Atlas is a LPDDR3 design without RTT for CMD/CTRL. The original change for nocturne is I0f593761dcbd121e7e758421af178931b9d78295 mb/google/poppy: Set UPD CmdTriStateDis for Nocturne BUG=b:111812662 Change-Id: I45b6dd22412c689c8db64f4650e9fa9e87dec2ec Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/28540 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/google/poppy')
-rw-r--r--src/mainboard/google/poppy/variants/atlas/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
index 968faefaf1..dc540995c0 100644
--- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
@@ -27,6 +27,9 @@ chip soc/intel/skylake
# Enable S0ix
register "s0ix_enable" = "1"
+ # Disable Command TriState
+ register "CmdTriStateDis" = "1"
+
# FSP Configuration
register "ProbelessTrace" = "0"
register "EnableLan" = "0"