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authorDivya Chellap <divya.chellappa@intel.com>2017-10-25 16:34:11 +0530
committerMartin Roth <martinroth@google.com>2017-11-03 22:00:20 +0000
commit8fcd559ef9780bb1f8a81e4fcf2985782b01817a (patch)
tree17f8b2e79bb5de1e5a74f23b7cadf518ed9fe570 /src/mainboard/google/poppy/variants
parente3d8471a7817250ee3f9e68d5612fa26d380825b (diff)
soraka: update pad reset config of WLAN_PE_RST to RSMRST
In skylake based platforms, setting GPIO pad reset config to DEEP will reset the gpio configuration across warm reset, set it to RSMRST to preserve the configuration across warm resets. Also, moving the configuration from early to late as appropriate. BUG=b:64386481 BRANCH=none TEST= WiFi functionality across S3, DeepS3, S0ix and warm/cold reboot. Change-Id: I38940b7c7d71e60bf0e51d6978a00be148ad61bc Signed-off-by: Divya Chellap <divya.chellappa@intel.com> Reviewed-on: https://review.coreboot.org/22174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/poppy/variants')
-rw-r--r--src/mainboard/google/poppy/variants/soraka/gpio.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/google/poppy/variants/soraka/gpio.c b/src/mainboard/google/poppy/variants/soraka/gpio.c
index 92f866f399..84a829447b 100644
--- a/src/mainboard/google/poppy/variants/soraka/gpio.c
+++ b/src/mainboard/google/poppy/variants/soraka/gpio.c
@@ -78,6 +78,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
/* B7 : SRCCLKREQ2# ==> NC */
PAD_CFG_NC(GPP_B7),
+ /* B8 : SRCCLKREQ3# ==> WLAN_PE_RST */
+ PAD_CFG_GPO(GPP_B8, 0, RSMRST),
/* B9 : SRCCLKREQ4# ==> NC */
PAD_CFG_NC(GPP_B9),
/* B10 : SRCCLKREQ5# ==> NC */
@@ -369,9 +371,6 @@ static const struct pad_config gpio_table[] = {
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
- /* B8 : SRCCLKREQ3# ==> WLAN_PE_RST */
- PAD_CFG_GPO(GPP_B8, 0, DEEP),
-
#if IS_ENABLED(CONFIG_POPPY_USE_SPI_TPM)
/* B15 : GSPI0_CS# ==> PCH_SPI_H1_3V3_CS_L */
PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1),