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authorVan Chen <van_chen@compal.corp-partner.google.com>2018-01-19 15:16:19 +0800
committerFurquan Shaikh <furquan@google.com>2018-01-25 06:08:36 +0000
commitf56e71b4d20bf19a74562f4ea080fe467fc8e088 (patch)
tree5da66e6620bb7e0db5d392ff5ae5aa889697709d /src/mainboard/google/poppy/variants
parentf7f01f70a4129b2854ae33ff7461e356df424767 (diff)
mb/google/poppy/variants/nami: Enable elan touchpad wakeup system from S3/S0ix
BUG=b:71839089 TEST= 1. emerge-nami coreboot chromeos-bootimage 2. powerd_dbus_suspend 3. touch touchpad to wakeup system 4. localhost ~ # cat /var/log/eventlog.txt | 2018-01-21 17:01:59 | S0ix Enter | 2018-01-21 17:02:04 | S0ix Exit | 2018-01-21 17:02:04 | Wake Source | GPIO | 80 Change-Id: Ie550cfa3f7b5fd105f89c16076d428743392d0e4 Signed-off-by: Van Chen <van_chen@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/23363 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/poppy/variants')
-rw-r--r--src/mainboard/google/poppy/variants/nami/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/nami/gpio.c4
2 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index 2d0ea75728..3db379b8c3 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -250,6 +250,7 @@ chip soc/intel/skylake
register "hid" = ""ELAN0000""
register "desc" = ""ELAN Touchpad""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E3_IRQ)"
+ register "wake" = "GPE0_DW2_16"
device i2c 15 on end
end
end # I2C #1
diff --git a/src/mainboard/google/poppy/variants/nami/gpio.c b/src/mainboard/google/poppy/variants/nami/gpio.c
index 999f1de38f..dbee643e4d 100644
--- a/src/mainboard/google/poppy/variants/nami/gpio.c
+++ b/src/mainboard/google/poppy/variants/nami/gpio.c
@@ -241,8 +241,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_E14, 20K_PD, DEEP, NF1),
/* E15 : DDPD_HPD2 ==> NC */
PAD_CFG_NC(GPP_E15),
- /* E16 : DDPE_HPD3 ==> NC(TP17) */
- PAD_CFG_NC(GPP_E16),
+ /* E16 : DDPE_HPD3 ==> PCH_GPP_E16 */
+ PAD_CFG_GPI_ACPI_SCI(GPP_E16, NONE, DEEP, INVERT),
/* E17 : EDP_HPD ==> EDP_HPD */
PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
/* E18 : DDPB_CTRLCLK ==> SOC_DP1_CTRL_CLK */