diff options
author | Frank Wu <frank_wu@compal.corp-partner.google.com> | 2018-03-30 14:24:05 +0800 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2018-04-17 06:05:50 +0000 |
commit | 2a67c370203b7f674646b2690ab92eb7f8ec9f13 (patch) | |
tree | c77ce24d60865faa016afd146481f80005e4e940 /src/mainboard/google/poppy/variants/nami/devicetree.cb | |
parent | 0ac94ee3b0729fa9f389fb431a0f82b51e37b80f (diff) |
mb/google/poppy/variants/nami: Enable DPTF and configure DPTF parameters
The commit enables DPTF function. The DPTF parameters are provided by
thermal team.
BUG=b:72974136
BRANCH=poppy
TEST=emerge-nami coreboot then check the parameters in DPTF ui tool
Change-Id: I9b7ae34ee64f19ef783a8c1571831b2293105a18
Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/25564
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/poppy/variants/nami/devicetree.cb')
-rw-r--r-- | src/mainboard/google/poppy/variants/nami/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index a04dd95e8d..de5fb676c8 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -21,6 +21,9 @@ chip soc/intel/skylake # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" + # Enable DPTF + register "dptf_enable" = "1" + # Enable S0ix register "s0ix_enable" = "1" |