diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-12-17 21:01:54 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-12-19 02:38:42 +0000 |
| commit | 2d12a901fbbb4cc5ee5255616cd9960223c310e0 (patch) | |
| tree | 1fdf1985c83b7cc3dc228b1eb8777472377964be /src/mainboard/google/poppy/variants/baseboard/devicetree.cb | |
| parent | 9c12e90819c3a7955adf9de2fa82cc652ae6a76f (diff) | |
mb/google/poppy: Configure pen reset and eject lines
This change configures the GPIOs for pen reset and eject lines and
exports required properties using ACPI table.
BUG=b:70773138
Change-Id: I52f6c3dced54259cde8ee6753275622622e15954
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22926
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/poppy/variants/baseboard/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/poppy/variants/baseboard/devicetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 22ef9aac55..ceb0c95a0e 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -308,6 +308,11 @@ chip soc/intel/skylake register "generic.hid" = ""WCOM50C1"" register "generic.desc" = ""WCOM Digitizer"" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D1_IRQ)" + register "generic.wake" = "GPE0_DW1_12" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D3)" + register "generic.reset_delay_ms" = "1" register "hid_desc_reg_offset" = "0x1" device i2c 0x9 on end end |