diff options
author | Furquan Shaikh <furquan@google.com> | 2018-03-02 14:36:56 -0800 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2018-03-05 17:56:08 +0000 |
commit | 908ea9132b2a53470292ac1a346a28a1453f4d7c (patch) | |
tree | 7ef504e4ac6c7aaa92af4c39701e1baf63dc22e1 /src/mainboard/google/poppy/romstage.c | |
parent | 39d3021b164429da00f4c4c79b2eccb42f416382 (diff) |
mb/google/poppy: Allow use of optional secondary SPD
This change adds support for variants to use secondary SPD if
required. This enables a variant to have different types of memory
supported using the same image.
BUG=b:73514687
Change-Id: I3add65ead99c510f2d6ec899fbf2cb9a06c79b0c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/24972
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/poppy/romstage.c')
-rw-r--r-- | src/mainboard/google/poppy/romstage.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/mainboard/google/poppy/romstage.c b/src/mainboard/google/poppy/romstage.c index 6bb4076d0d..f9b23e501a 100644 --- a/src/mainboard/google/poppy/romstage.c +++ b/src/mainboard/google/poppy/romstage.c @@ -110,20 +110,21 @@ static void mainboard_print_spd_info(const uint8_t *spd, enum memory_type type) } } -static uintptr_t mainboard_get_spd_data(enum memory_type type) +static uintptr_t mainboard_get_spd_data(enum memory_type type, bool use_sec_spd) { char *spd_file; size_t spd_file_len; int spd_index; const size_t spd_len = spd_info[type].len; + const char *spd_bin = use_sec_spd ? "sec-spd.bin" : "spd.bin"; spd_index = variant_memory_sku(); assert(spd_index >= 0); printk(BIOS_INFO, "SPD index %d\n", spd_index); /* Load SPD data from CBFS */ - spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD, - &spd_file_len); + spd_file = cbfs_boot_map_with_leak(spd_bin, CBFS_TYPE_SPD, + &spd_file_len); if (!spd_file) die("SPD data not found."); @@ -160,7 +161,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) p.rcomp_resistor_size); memcpy(&mem_cfg->RcompTarget, p.rcomp_target, p.rcomp_target_size); - mem_cfg->MemorySpdPtr00 = mainboard_get_spd_data(p.type); + mem_cfg->MemorySpdPtr00 = mainboard_get_spd_data(p.type, p.use_sec_spd); mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00; mem_cfg->MemorySpdDataLen = spd_info[p.type].len; } |