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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2021-04-08 16:50:18 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-04-15 07:40:09 +0000
commit31316cfccaa3991e443ce1ddcdd7e49486fa7101 (patch)
tree1e9576252954a32845839fdcfd11eaa22f18d695 /src/mainboard/google/poppy/bootblock.c
parent4ae7ee6e2b9f920b012ea9f60d5f5bbb32e62f3a (diff)
mb/google/brya: Add FPMCU power control
Enable CRFP power control in gpio table. RST needs to drive low before PWR enable. Since reset signal is asserted in bootblock, it results in FPMCU not working after a S3 resume. This is a known issue. BUG=b:181377402 BRANCH=None Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I8a8fae80c3cc186e0a097ab2007abb656f382cbd Reviewed-on: https://review.coreboot.org/c/coreboot/+/52185 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/poppy/bootblock.c')
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