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authorStefan Reinauer <reinauer@chromium.org>2013-06-20 16:13:19 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 22:47:53 +0200
commit3a0d0d8622c9f4f14116ecb3f265dddf52fece84 (patch)
tree73f7f8662c3febef890a766fcfbbff18b02c46f5 /src/mainboard/google/pit
parent2ad63c2e08de2cccc7de42c4c3c5efeec7af25ad (diff)
Exynos5420: Initialize USB PHY
... this is needed for libpayload to talk to USB devices. (forward ported from https://gerrit.chromium.org/gerrit/#/c/55554) Change-Id: I5a20864689efd0c0149775e6d85b658e0cc6715c Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3697 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/pit')
-rw-r--r--src/mainboard/google/pit/devicetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/pit/devicetree.cb b/src/mainboard/google/pit/devicetree.cb
index 3b6cdb9014..0c687c41c3 100644
--- a/src/mainboard/google/pit/devicetree.cb
+++ b/src/mainboard/google/pit/devicetree.cb
@@ -30,4 +30,6 @@ chip cpu/samsung/exynos5420
register "left_margin" = "80"
register "right_margin" = "48"
register "hsync" = "32"
+ register "usb_vbus_gpio" = "GPIO_X11"
+ register "usb_hsic_gpio" = "GPIO_E10"
end