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authorMatt DeVillier <matt.devillier@gmail.com>2016-11-20 13:34:04 -0600
committerMartin Roth <martinroth@google.com>2016-11-24 05:23:13 +0100
commitb952b0d356ea22b5e8dc6a701493ee3523c200a9 (patch)
tree84cd26e557b097279a1fede9f1ca482f9a2ba4ba /src/mainboard/google/panther/dsdt.asl
parent80ff038b28497576af8d1ee88438204921e506eb (diff)
Remove board google/panther
Once #17329 is committed, no reason to have google/panther exist as a separate board anymore. Change-Id: I9a11273c39423d5ff33a7d1f91c8d8cffef97ec1 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/17538 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google/panther/dsdt.asl')
-rw-r--r--src/mainboard/google/panther/dsdt.asl61
1 files changed, 0 insertions, 61 deletions
diff --git a/src/mainboard/google/panther/dsdt.asl b/src/mainboard/google/panther/dsdt.asl
deleted file mode 100644
index 66cc041caa..0000000000
--- a/src/mainboard/google/panther/dsdt.asl
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define ENABLE_TPM
-
-DefinitionBlock(
- "dsdt.aml",
- "DSDT",
- 0x02, // DSDT revision: ACPI v2.0
- "COREv4", // OEM id
- "COREBOOT", // OEM table id
- 0x20110725 // OEM revision
-)
-{
- // Some generic macros
- #include "acpi/platform.asl"
-
- // global NVS and variables
- #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
-
- // General Purpose Events
- //#include "acpi/gpe.asl"
-
- // CPU
- #include <cpu/intel/haswell/acpi/cpu.asl>
-
- Scope (\_SB) {
- Device (PCI0)
- {
- #include <northbridge/intel/haswell/acpi/haswell.asl>
- #include <southbridge/intel/lynxpoint/acpi/pch.asl>
-
- #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
- }
- }
-
- // Mainboard devices
- #include "acpi/mainboard.asl"
-
- // Thermal handler
- #include "acpi/thermal.asl"
-
- // Chrome OS specific
- #include <vendorcode/google/chromeos/acpi/chromeos.asl>
-
- // Chipset specific sleep states
- #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
-}