mainboard: Add new board Google Panther

(Panther clone of Ia41af8425ab6c24746253abd025acd3365dd5a18 by reinauer)

BUG=chrome-os-partner:23563
TEST=emerge-panther chromeos-coreboot-panther

[pg: Drop configs/, which is chromeos stuff, adapted
     libpayload's config.panther to work with upstream]

[pm: Add HAVE_IFD_BIN and HAVE_ME_BIN Kconfig options]
[pm: rebase to master branch of coreboot upstream]
[md: don't use FMAP to get MAC address if CONFIG_CHROMEOS not set]

Change-Id: I50fd5c02da154e424dfefbe2020f4ce7ef9a4f8f
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/174555
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: http://review.coreboot.org/5990
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

1 files changed, 136 insertions, 0 deletions

diff --git a/src/mainboard/google/panther/devicetree.cb b/src/mainboard/google/panther/devicetree.cb
new file mode 100644
index 0000000000..95f108402b
--- /dev/null
+++ b/src/mainboard/google/panther/devicetree.cb
@@ -0,0 +1,136 @@
+chip northbridge/intel/haswell
+
+	# Disable eDP Hotplug
+	register "gpu_dp_d_hotplug" = "0x00"
+
+	# Enable DisplayPort C Hotplug with 6ms pulse
+	register "gpu_dp_c_hotplug" = "0x06"
+
+	# Enable HDMI Hotplug with 6ms pulse
+	register "gpu_dp_b_hotplug" = "0x06"
+
+	device cpu_cluster 0 on
+		chip cpu/intel/socket_rPGA989
+			device lapic 0 on end
+		end
+		chip cpu/intel/haswell
+			# Magic APIC ID to locate this chip
+			device lapic 0xACAC off end
+
+			register "c1_battery" = "2"	# ACPI(C1) = MWAIT(C1E)
+			register "c2_battery" = "3"	# ACPI(C2) = MWAIT(C3)
+			register "c3_battery" = "9"	# ACPI(C3) = MWAIT(C7S)
+
+			register "c1_acpower" = "2"	# ACPI(C1) = MWAIT(C1E)
+			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
+			register "c3_acpower" = "9"	# ACPI(C3) = MWAIT(C7S)
+		end
+	end
+
+	device domain 0 on
+		subsystemid 0x1ae0 0xc000 inherit
+		device pci 00.0 on end # host bridge
+		device pci 02.0 on end # vga controller
+		device pci 03.0 on end # mini-hd audio
+
+		chip southbridge/intel/lynxpoint
+			register "pirqa_routing" = "0x8b"
+			register "pirqb_routing" = "0x8a"
+			register "pirqc_routing" = "0x8b"
+			register "pirqd_routing" = "0x8b"
+			register "pirqe_routing" = "0x80"
+			register "pirqf_routing" = "0x80"
+			register "pirqg_routing" = "0x80"
+			register "pirqh_routing" = "0x80"
+
+			# SuperIO range is 0x700-0x73f
+			register "gen2_dec" = "0x003c0701"
+
+			# EC_SMI is GPIO34
+			register "alt_gp_smi_en" = "0x0004"
+			register "gpe0_en_1" = "0x00000000"
+			# EC_SCI is GPIO36
+			register "gpe0_en_2" = "0x00000010"
+			register "gpe0_en_3" = "0x00000000"
+			register "gpe0_en_4" = "0x00000000"
+
+			register "ide_legacy_combined" = "0x0"
+			register "sata_ahci" = "0x1"
+			register "sata_port_map" = "0x1"
+
+			register "sio_acpi_mode" = "0"
+			register "sio_i2c0_voltage" = "0" # 3.3V
+			register "sio_i2c1_voltage" = "0" # 3.3V
+
+			# Enable port coalescing
+			register "pcie_port_coalesce" = "1"
+
+			# Disable PCIe CLKOUT 1,5 and CLKOUT_XDP
+			register "icc_clock_disable" = "0x01220000"
+
+			# Route all USB ports to XHCI per default
+			register "xhci_default" = "1"
+
+			device pci 13.0 off end # Smart Sound Audio DSP
+			device pci 14.0 on end # USB3 XHCI
+			device pci 15.0 on end # Serial I/O DMA
+			device pci 15.1 on end # I2C0
+			device pci 15.2 on end # I2C1
+			device pci 15.3 off end # GSPI0
+			device pci 15.4 off end # GSPI1
+			device pci 15.5 off end # UART0
+			device pci 15.6 off end # UART1
+			device pci 16.0 on end # Management Engine Interface 1
+			device pci 16.1 off end # Management Engine Interface 2
+			device pci 16.2 off end # Management Engine IDE-R
+			device pci 16.3 off end # Management Engine KT
+			device pci 17.0 off end # SDIO
+			device pci 19.0 off end # GbE
+			device pci 1b.0 on end # High Definition Audio
+			device pci 1c.0 off end # PCIe Port #1
+			device pci 1c.1 off end # PCIe Port #2
+			device pci 1c.2 on end # PCIe Port #3
+			device pci 1c.3 on end # PCIe Port #4
+			device pci 1c.4 on end # PCIe Port #5
+			device pci 1c.5 off end # PCIe Port #6
+			device pci 1d.0 on end # USB2 EHCI
+			device pci 1e.0 off end # PCI bridge
+			device pci 1f.0 on
+				chip superio/ite/it8772f
+					# Skip keyboard init
+					register "skip_keyboard" = "1"
+					# Enable PECI on TMPIN3
+					register "peci_tmpin" = "3"
+					# Enable FAN2
+					register "fan2_enable" = "1"
+
+					device pnp 2e.0 off end # FDC
+					device pnp 2e.1 on # Serial Port 1
+						io 0x60 = 0x3f8
+						irq 0x70 = 4
+					end
+					device pnp 2e.4 on # Environment Controller
+						io 0x60 = 0x700
+						io 0x62 = 0x710
+					end
+					device pnp 2e.7 on # GPIO
+						io 0x60 = 0x720
+						io 0x62 = 0x730
+					end
+					device pnp 2e.5 on
+						io 0x60 = 0x60
+						io 0x62 = 0x64
+						irq 0x70 = 1
+					end # Keyboard
+					device pnp 2e.6 on
+						irq 0x70 = 12
+					end # Mouse
+					device pnp 2e.a off end # IR
+				end
+			end # LPC bridge
+			device pci 1f.2 on end # SATA Controller
+			device pci 1f.3 on end # SMBus
+			device pci 1f.6 on end # Thermal
+		end
+	end
+end