diff options
| author | Justin TerAvest <teravest@chromium.org> | 2018-03-16 13:29:42 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-03-19 14:24:04 +0000 |
| commit | cc6953bb346e921fb4ed49931e94da0f82e922e7 (patch) | |
| tree | d04b6141809d42bda7097e9a39ac11189f1e4387 /src/mainboard/google/octopus/variants | |
| parent | f12bb7bcf2894eb226028bf960621ccfc680ac71 (diff) | |
mb/google/octopus: Configure PCH_WP_OD early.
The GPIO for EEPROM write-protect should be configured early, before
romstage. This change configures that pad earlier. This pad is the same
on the existing Octopus schematics.
BUG=None
TEST=None
Change-Id: Idf296ba6aad75b890afabd6f7c7c51fbaf911214
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://review.coreboot.org/25250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/octopus/variants')
| -rw-r--r-- | src/mainboard/google/octopus/variants/baseboard/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c index 135fab9de0..6b71a09b78 100644 --- a/src/mainboard/google/octopus/variants/baseboard/gpio.c +++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c @@ -236,7 +236,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_177, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* SMB_CLK */ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* SMB_DATA */ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_189, 0, DEEP, NONE, TxDRxE, DISPUPD), /* OSC_CLK_OUT_0 */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_190, 0, DEEP, NONE, TxDRxE, DISPUPD), /* OSC_CLK_OUT_1 */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_191, NONE, DEEP, NF1), /* CNV_BRI_DT */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_192, UP_20K, DEEP, NF1), /* CNV_BRI_RSP */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_193, NONE, DEEP, NF1), /* CNV_RGI_DT */ @@ -264,6 +263,7 @@ const struct pad_config *__attribute__((weak)) variant_gpio_table(size_t *num) /* GPIOs needed prior to ramstage. */ static const struct pad_config early_gpio_table[] = { + PAD_CFG_GPI(GPIO_190, NONE, DEEP), /* PCH_WP_OD */ }; const struct pad_config *__attribute__((weak)) |