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authorSheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>2020-10-26 10:44:28 +0800
committerFurquan Shaikh <furquan@google.com>2020-11-17 00:39:30 +0000
commit1fe129f321ee9b8120c12d6224a728db2e564cf0 (patch)
tree9418c276d67afc0eabbc9ae9f5d3ac84e3c58e79 /src/mainboard/google/octopus/variants
parentc1e8aa2f46c63a8e994f834b37e468ffa93db31b (diff)
mb/google/octopus/variants/bobba: Add G2Touch touchscreen support
Add G2Touch touchscreen support for bobba. BUG=b:171636614, b:169730666 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage, and check touchscreen work. Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com> Change-Id: Ia361a56c050d7cbd7325b3c09fc34d8707441cc4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46808 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/octopus/variants')
-rw-r--r--src/mainboard/google/octopus/variants/bobba/overridetree.cb14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/bobba/overridetree.cb b/src/mainboard/google/octopus/variants/bobba/overridetree.cb
index 662e6af8d6..3c7187e048 100644
--- a/src/mainboard/google/octopus/variants/bobba/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/bobba/overridetree.cb
@@ -210,6 +210,20 @@ chip soc/intel/apollolake
register "has_power_resource" = "1"
device i2c 39 on end
end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""GTCH7502""
+ register "generic.desc" = ""G2TOUCH Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_212_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
+ register "generic.reset_delay_ms" = "70"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
+ register "generic.enable_delay_ms" = "1"
+ register "generic.has_power_resource" = "1"
+ register "generic.disable_gpio_export_in_crs" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 40 on end
+ end
end # - I2C 7
end