diff options
| author | Furquan Shaikh <furquan@google.com> | 2018-03-28 11:53:37 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2018-03-29 21:53:42 +0000 |
| commit | ade3bc5c402d6311a5a4a8c4640b78134b857451 (patch) | |
| tree | 3affce1e7f6040edcf32bd87e6d5c444844869a4 /src/mainboard/google/octopus/variants/baseboard/devicetree.cb | |
| parent | f5116952bb77ac361ad541dea00d9df28067219e (diff) | |
mb/google/octopus: Fix wifi configuration
This change updates devicetree and GPIO configurations to match the
schematics:
1. pcie_rp...[2] is the one being used for wifi, thus, clk_req and
deemphasis_enable for [2] need to be set instead of [0].
2. WLAN power enable, wifi disable and PERST# GPIOs need to be
configured correctly.
BUG=b:76180142
TEST=Verified that wlan0 scan works.
Change-Id: Ic51a94902e2cac3491081ade32079e5b88719f45
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/25417
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/google/octopus/variants/baseboard/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/octopus/variants/baseboard/devicetree.cb | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index 7aa7038fa8..10d21d6382 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -3,20 +3,20 @@ chip soc/intel/apollolake device lapic 0 on end end - register "pcie_rp_clkreq_pin[0]" = "3" # wifi/bt + register "pcie_rp_clkreq_pin[2]" = "3" # wifi/bt # Disable unused clkreq of PCIe root ports + register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED" - register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED" # Set de-emphasis to disabled for PCIE WiFI (Thunderpeak) # as it is required for detection - register "pcie_rp_deemphasis_enable[0]" = "0" + register "pcie_rp_deemphasis_enable[2]" = "0" # Set de-emphasis to default (enabled) for remaining ports + register "pcie_rp_deemphasis_enable[0]" = "1" register "pcie_rp_deemphasis_enable[1]" = "1" - register "pcie_rp_deemphasis_enable[2]" = "1" register "pcie_rp_deemphasis_enable[3]" = "1" register "pcie_rp_deemphasis_enable[4]" = "1" register "pcie_rp_deemphasis_enable[5]" = "1" @@ -105,7 +105,11 @@ chip soc/intel/apollolake device pci 0f.2 on end # - Heci3 device pci 11.0 off end # - ISH device pci 12.0 off end # - SATA - device pci 13.0 on end # - PCIe-A 0 Onboard M2 Slot(Wifi) + device pci 13.0 on + chip drivers/intel/wifi + device pci 00.0 on end + end + end # - PCIe-A 0 Onboard M2 Slot(Wifi) device pci 13.1 off end # - PCIe-A 1 device pci 13.2 off end # - PCIe-A 2 device pci 13.3 off end # - PCIe-A 3 |