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authorPhilipp Deppenwiese <zaolin@das-labor.org>2018-02-27 19:40:52 +0100
committerMartin Roth <martinroth@google.com>2018-06-04 20:33:07 +0000
commitc07f8fbe6fd13e4245da71574b52b47e9733db84 (patch)
tree12db8b3c40552eab81045c6165538e2d3ba36ce8 /src/mainboard/google/octopus/Kconfig
parent961d31bdb3c97e177156ed335d6f2c726d08ab51 (diff)
security/tpm: Unify the coreboot TPM software stack
* Remove 2nd software stack in pc80 drivers directory. * Create TSPI interface for common usage. * Refactor TSS / TIS code base. * Add vendor tss (Cr50) directory. * Change kconfig options for TPM to TPM1. * Add user / board configuration with: * MAINBOARD_HAS_*_TPM # * BUS driver * MAINBOARD_HAS_TPM1 or MAINBOARD_HAS_TPM2 * Add kconfig TPM user selection (e.g. pluggable TPMs) * Fix existing headers and function calls. * Fix vboot for interface usage and antirollback mode. Change-Id: I7ec277e82a3c20c62a0548a1a2b013e6ce8f5b3f Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/24903 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/octopus/Kconfig')
-rw-r--r--src/mainboard/google/octopus/Kconfig11
1 files changed, 2 insertions, 9 deletions
diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig
index b0957b8e42..94333c5c6b 100644
--- a/src/mainboard/google/octopus/Kconfig
+++ b/src/mainboard/google/octopus/Kconfig
@@ -12,11 +12,12 @@ config BOARD_GOOGLE_BASEBOARD_OCTOPUS
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_BOARDID
select EC_GOOGLE_CHROMEEC_LPC
- select HAS_TPM if !VBOOT_MOCK_SECDATA
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select MAINBOARD_HAS_CHROMEOS
select SOC_ESPI
+ select MAINBOARD_HAS_SPI_TPM_CR50
+ select MAINBOARD_HAS_TPM2
if BOARD_GOOGLE_BASEBOARD_OCTOPUS
@@ -68,14 +69,6 @@ config GBB_HWID
default "PHASER TEST 7167" if BOARD_GOOGLE_PHASER
default "OCTOPUS TEST 6859" if BOARD_GOOGLE_OCTOPUS
-config HAS_TPM
- bool
- default n
- select MAINBOARD_HAS_SPI_TPM_CR50
- select MAINBOARD_HAS_TPM2
- select SPI_TPM
- select TPM2
-
config MAX_CPUS
int
default 4