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authorSubrata Banik <subratabanik@google.com>2024-11-12 13:52:34 +0530
committerSubrata Banik <subratabanik@google.com>2024-11-13 03:22:20 +0000
commit386b7ee85919316ee6f0d7547146d30306584871 (patch)
treefc2ae62751a8dc7d217e1a6bb1d6e11f61d5b4d5 /src/mainboard/google/nyan_blaze
parentfce6e02a6079ba3c7ff443bfb989a6caaea160ab (diff)
soc/intel/alderlake: Use CSE sync in ramstage config
This patch updates the eSOL rendering logic to use the SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE config option instead of SOC_INTEL_CSE_LITE_SKU. The SOC_INTEL_CSE_LITE_SKU config option was incorrectly used to determine whether to render eSOL during ramstage. The SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE config option specifically indicates whether CSE synchronization is performed during ramstage, making it a more appropriate choice for this purpose. This change ensures that eSOL is rendered correctly during ramstage on platforms that require CSE synchronization. TEST=Able to render eSOL during ramstage for google/trulo. Change-Id: I0dd335d5653d774bb5a2e6d7b65831bba080f272 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85108 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Jayvik Desai <jayvik@google.com>
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