diff options
| author | Gabe Black <gabeblack@google.com> | 2014-04-03 14:12:45 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-12-15 20:15:15 +0100 |
| commit | 46e097598732ee2993091be0c46f42d2b1802424 (patch) | |
| tree | 8e1449eb91673cd1161c73f494a2bced97279d67 /src/mainboard/google/nyan_blaze/romstage.c | |
| parent | cad7c4e45308ced5a43f2a59374a9e575503a311 (diff) | |
nyan: Enable the cbmem console on nyan and allocate space for it in SRAM.
This change takes about 8K of space away from the cbfs cache and repurposes
it for the cbmem console buffer. This is a little more than twice the space
we currently need for the bootblock and ROM stage to give us some room to grow
and for extra debug output if needed.
BUG=None
TEST=Built and booted on nyan. Checked the cbmem output.
BRANCH=None
Original-Change-Id: I6543bf5efddcf2377528a273f846b8090cd8be55
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/193169
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 32e9ea6f9ecaa9b5441c91acab96514222f3af2c)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ia9e5cc7a4b561bd89137cdc8b594584b272d9fab
Reviewed-on: http://review.coreboot.org/7757
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/nyan_blaze/romstage.c')
| -rw-r--r-- | src/mainboard/google/nyan_blaze/romstage.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c index c239b4eb7e..48d3842aa2 100644 --- a/src/mainboard/google/nyan_blaze/romstage.c +++ b/src/mainboard/google/nyan_blaze/romstage.c @@ -25,6 +25,7 @@ #include <device/device.h> #include <cbfs.h> #include <cbmem.h> +#include <console/cbmem_console.h> #include <console/console.h> #include <romstage_handoff.h> #include <vendorcode/google/chromeos/chromeos.h> @@ -215,6 +216,9 @@ static void __attribute__((noinline)) romstage(void) "fallback/coreboot_ram"); timestamp_add(TS_END_COPYRAM, timestamp_get()); +#if CONFIG_CONSOLE_CBMEM + cbmemc_reinit(); +#endif stage_exit(entry); } |