diff options
| author | Gabe Black <gabeblack@google.com> | 2014-03-05 22:07:41 -0800 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-11-13 06:27:40 +0100 |
| commit | 41c926029c4fb80f8c3d103681f4e9434ca9677c (patch) | |
| tree | 0c8eefd9cc66e420383b09b1f67063ece5205449 /src/mainboard/google/nyan_big/bootblock.c | |
| parent | 51f6fb2a518a32f6265a87198c4145f604634047 (diff) | |
nyan: big: Set the i2c controller frequencies appropriately.
These had been set to something fairly random which results in a very slow
clock on the bus itself. The new settings take into consideration the speed
the devices on the bus can run at. The TPM can't seem to handle speeds above
40KHz, but some documentation suggests that it should be able to handle up to
at least 100KHz.
BUG=chrome-os-partner:25467
TEST=Built and booted on nyan rev1. Built for big.
BRANCH=None
Original-Change-Id: Iee98957c7e492c7dd08b071aeef3cce75c4a9e56
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/189015
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit afca97a29aeb99d3899b713d0e57a3b3214f0d96)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Iab0c50b2119ac322252564354c90b5cb2d255c97
Reviewed-on: http://review.coreboot.org/7418
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/mainboard/google/nyan_big/bootblock.c')
| -rw-r--r-- | src/mainboard/google/nyan_big/bootblock.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/nyan_big/bootblock.c b/src/mainboard/google/nyan_big/bootblock.c index e88765fa0d..05bb1c94c0 100644 --- a/src/mainboard/google/nyan_big/bootblock.c +++ b/src/mainboard/google/nyan_big/bootblock.c @@ -40,8 +40,8 @@ static void set_clock_sources(void) clock_configure_source(mselect, PLLP, 102000); - /* TODO: is the 1.333MHz correct? This may have always been bogus... */ - clock_configure_source(i2c5, CLK_M, 1333); + /* The PMIC is on I2C5 and can run at 400 KHz. */ + clock_configure_i2c_scl_freq(i2c5, PLLP, 400); /* TODO: We should be able to set this to 50MHz, but that did not seem * reliable. */ |