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authorXiang Wang <wxjstz@126.com>2018-07-11 12:13:00 +0800
committerMartin Roth <martinroth@google.com>2018-07-18 18:56:10 +0000
commit35da319b725805482e4d57571d92cccf65384d63 (patch)
tree75d67caf78b3cc8082b884f0ad1410949a85afdf /src/mainboard/google/nyan/Kconfig
parent3a1a956286d466e0438dc76377db5bdf9fb374ff (diff)
riscv: add CAR interface
Add an interface to support cache as ram. Initialize stack pointer for each hart. Change-Id: Ic3920e01dd1a7f047a53de57250589000a111409 Signed-off-by: Xiang Wang <wxjstz@126.com> Reviewed-on: https://review.coreboot.org/27430 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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