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authorJon Murphy <jpmurphy@google.com>2023-03-29 15:38:19 -0600
committerRaul Rangel <rrangel@chromium.org>2023-04-11 20:31:45 +0000
commita456458db08c4ce2a1c2b7ed6dd6bd277a8059ab (patch)
treecb6042f7effcb9d44c0b1930d0102ca4607683c7 /src/mainboard/google/myst/variants
parent3f34879e2800d0d599331b2a5a068582f6f39b28 (diff)
mb/google/myst: Enable chromeOS EC
BUG=b:270624655 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: Id18a311097d575973087eb92fd446a5c511f570e Reviewed-on: https://review.coreboot.org/c/coreboot/+/74099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/myst/variants')
-rw-r--r--src/mainboard/google/myst/variants/baseboard/devicetree.cb8
-rw-r--r--src/mainboard/google/myst/variants/baseboard/include/baseboard/ec.h85
2 files changed, 92 insertions, 1 deletions
diff --git a/src/mainboard/google/myst/variants/baseboard/devicetree.cb b/src/mainboard/google/myst/variants/baseboard/devicetree.cb
index 164a47ad7f..ef41b0dabf 100644
--- a/src/mainboard/google/myst/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/myst/variants/baseboard/devicetree.cb
@@ -1,4 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-or-later
chip soc/amd/phoenix
- device domain 0 on end # domain
+ device domain 0 on
+ device ref lpc_bridge on
+ chip ec/google/chromeec
+ device pnp 0c09.0 alias chrome_ec on end
+ end
+ end
+ end # domain
end # chip soc/amd/phoenix
diff --git a/src/mainboard/google/myst/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/myst/variants/baseboard/include/baseboard/ec.h
new file mode 100644
index 0000000000..c6ab30f59d
--- /dev/null
+++ b/src/mainboard/google/myst/variants/baseboard/include/baseboard/ec.h
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __MAINBOARD_EC_H__
+#define __MAINBOARD_EC_H__
+
+#include <ec/ec.h>
+#include <ec/google/chromeec/ec_commands.h>
+#include <baseboard/gpio.h>
+#include <gpio.h>
+
+#define MAINBOARD_EC_SCI_EVENTS \
+ (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BODY_DETECT_CHANGE))
+
+#define MAINBOARD_EC_SMI_EVENTS (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED))
+
+/* EC can wake from S5 with lid or power button */
+#define MAINBOARD_EC_S5_WAKE_EVENTS \
+ (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON))
+
+/* EC can wake from S3 with lid, power button or mode change event */
+#define MAINBOARD_EC_S3_WAKE_EVENTS \
+ (MAINBOARD_EC_S5_WAKE_EVENTS \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN))
+
+#define MAINBOARD_EC_S0IX_WAKE_EVENTS (MAINBOARD_EC_S3_WAKE_EVENTS)
+
+/* Log EC wake events plus EC shutdown events */
+#define MAINBOARD_EC_LOG_EVENTS \
+ (EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) \
+ | EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC))
+
+/*
+ * ACPI related definitions for ASL code.
+ */
+
+/* Set GPI for SCI */
+#define EC_SCI_GPI GEVENT_24 /* eSPI system event -> GPE 24 */
+
+/* Enable LID switch and provide wake pin for EC */
+#define EC_ENABLE_LID_SWITCH
+#define EC_ENABLE_WAKE_PIN GEVENT_13 /* AGPIO 17 -> GPE 13 */
+
+/* Enable MKBP for buttons and switches */
+#define EC_ENABLE_MKBP_DEVICE
+
+#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */
+#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */
+#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */
+#define SIO_EC_PS2K_IRQ Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {1}
+
+/* Enable EC sync interrupt */
+#define EC_ENABLE_SYNC_IRQ_GPIO
+
+/* EC sync irq */
+#define EC_SYNC_IRQ GPIO_90
+
+/* Enable EC backed PD MCU device in ACPI */
+#define EC_ENABLE_PD_MCU_DEVICE
+
+/* Enable EC backed Keyboard Backlight in ACPI */
+#define EC_ENABLE_KEYBOARD_BACKLIGHT
+
+#endif /* __MAINBOARD_EC_H__ */