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authorRex-BC Chen <rex-bc.chen@mediatek.com>2022-07-25 19:08:06 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-08-02 12:20:52 +0000
commit125082091655feb99892f1af440f282213f3037f (patch)
tree1ce2789467e4e51501e5742dd402c2481fc9a7fd /src/mainboard/google/mistral
parent4c24606637c2133f0e459ba324f847d5714b9e12 (diff)
mb/google/geralt: Enable Chrome EC
Initialize SPI bus 0 for Chrome EC control. TEST=build pass BUG=b:236331724 Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I6de5ea8a0273a3b0c725e4cdbcf69f4db74c5db7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66272 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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