diff options
| author | Martin Roth <martin@coreboot.org> | 2021-05-04 12:54:18 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-05-07 02:54:22 +0000 |
| commit | 4f27dde72aaaa203113fb29acca6fc3b88b89de4 (patch) | |
| tree | b7e06ea98d2e275d677f5026a43ff9c56bac31aa /src/mainboard/google/mancomb | |
| parent | d233b1a8310ff79f9d4d1ce0cd9285b1a668846d (diff) | |
mb/google/mancomb: Update AMDFW config file
Mancomb uses DDR4 SODIMMs, but the default cezanne configuration is for
the LPDDR4 version. This changes to use SODIMMS.
Further changes may be needed for platform customization, so I put the
config file in variants/baseboard instead of the root mancomb directory.
BUG=b:187094481
TEST=Build only
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Icc4dc8aec2053cb177765f57e57cac7a099508fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/google/mancomb')
| -rw-r--r-- | src/mainboard/google/mancomb/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/google/mancomb/variants/baseboard/amdfw.cfg | 40 |
2 files changed, 44 insertions, 0 deletions
diff --git a/src/mainboard/google/mancomb/Kconfig b/src/mainboard/google/mancomb/Kconfig index 552c022adc..91ec1693e5 100644 --- a/src/mainboard/google/mancomb/Kconfig +++ b/src/mainboard/google/mancomb/Kconfig @@ -67,6 +67,10 @@ config DRIVER_TPM_I2C_ADDR hex default 0x50 +config AMDFW_CONFIG_FILE + string + default "src/mainboard/google/mancomb/variants/baseboard/amdfw.cfg" + config EFS_SPI_READ_MODE int default 0 if EM100 # Normal read mode diff --git a/src/mainboard/google/mancomb/variants/baseboard/amdfw.cfg b/src/mainboard/google/mancomb/variants/baseboard/amdfw.cfg new file mode 100644 index 0000000000..2d4e0f8bd7 --- /dev/null +++ b/src/mainboard/google/mancomb/variants/baseboard/amdfw.cfg @@ -0,0 +1,40 @@ +# PSP fw config file + +FIRMWARE_LOCATION 3rdparty/amd_blobs/cezanne/PSP + +# type file +# PSP +AMD_PUBKEY_FILE TypeId0x00_CezannePublicKey.tkn +PSPBTLDR_FILE TypeId0x01_PspBootLoader_CZN.sbin +PSPBTLDR_WL_FILE TypeId0x01_PspBootLoader_WL_CZN.sbin +PSPSECUREOS_FILE TypeId0x02_PspOS_CZN.sbin +PSPRCVR_FILE TypeId0x03_PspRecoveryBootLoader_CZN.sbin +PSP_SMUFW1_SUB0_FILE TypeId0x08_SmuFirmware_CZN.csbin +PSPSECUREDEBUG_FILE TypeId0x09_SecureDebugUnlockKey_CZN.stkn +PSPTRUSTLETS_FILE TypeId0x0C_FtpmDrv_CZN.csbin +PSP_SMUFW2_SUB0_FILE TypeId0x12_SmuFirmware2_CZN.csbin +PSP_SEC_DEBUG_FILE TypeId0x13_PspEarlyUnlock_CZN.sbin +PSP_HW_IPCFG_FILE TypeId0x20_HwIpCfg_CZN_A0.sbin +PSP_IKEK_FILE TypeId0x21_PspIkek_CZN.bin +PSP_SECG0_FILE TypeId0x24_SecurePolicyL0_CZN.sbin +PSP_MP2FW0_FILE TypeId0x25_Mp2Fw_CZN.sbin +AMD_DRIVER_ENTRIES TypeId0x28_PspSystemDriver_CZN.sbin +PSP_KVM_ENGINE_DUMMY_FILE TypeId0x29_KvmEngineDummy.csbin +PSP_S0I3_FILE TypeId0x2D_AgesaRunTimeDrv_CZN.sbin +PSP_ABL0_FILE TypeId0x30_AgesaBootloaderU_CZN.csbin +VBIOS_BTLOADER_FILE TypeId0x3C_VbiosBootLoader_CZN.sbin +SECURE_POLICY_L1_FILE TypeId0x45_SecurePolicyL1_CZN.sbin +UNIFIEDUSB_FILE TypeId0x44_UnifiedUsb_CZN.sbin +DRTMTA_FILE TypeId0x47_DrtmTA_CZN.sbin +KEYDBBL_FILE TypeId0x50_KeyDbBl_CZN.sbin +KEYDB_TOS_FILE TypeId0x51_KeyDbTos_CZN.sbin +DMCUERAMDCN21_FILE TypeId0x58_DmcuEramDcn21.sbin +DMCUINTVECTORSDCN21_FILE TypeId0x59_DmcuIntvectorsDcn21.sbin +PSPBTLDR_AB_FILE TypeId0x73_PspBootLoader_AB_CZN.sbin + +# BDT +PSP_PMUI_FILE1 TypeId0x64_Appb_CZN_1D_Ddr4_Udimm_Imem.csbin +PSP_PMUD_FILE1 TypeId0x65_Appb_CZN_1D_Ddr4_Udimm_Dmem.csbin +PSP_PMUI_FILE2 TypeId0x64_Appb_CZN_2D_Ddr4_Udimm_Imem.csbin +PSP_PMUD_FILE2 TypeId0x65_Appb_CZN_2D_Ddr4_Udimm_Dmem.csbin +PSP_MP2CFG_FILE MP2FWConfig.sbin |