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authorDavid Wu <david_wu@quanta.corp-partner.google.com>2021-11-11 02:41:26 +0000
committerPaul Fagerburg <pfagerburg@chromium.org>2021-11-13 00:19:33 +0000
commit999f9e348789476d1b9befd9ce410f52f841c0ef (patch)
tree922693af293ea92d445b9b129575782108e3458a /src/mainboard/google/link
parenta1aca1e656900010d0a7b0bc57690464d0447768 (diff)
Revert "mb/google/brask: Correct GPIO GPP_R6 and GPP_R7 setting"
This reverts commit ba6fdc892d62741e456ac5628fcd6f869c4cb9af. Reason for revert: Refer to intel doc #627075 (Intel_600_Series Chipset_Family_PCH_GPIO_Impl_Sumry_ Rev1p5p1), GPP_R6 ~ GPP_R7 should be NF3 for dmic. Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: I460fd99b4ad4b9c470f692032ff7ea2b51cad388 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59149 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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