diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-12-02 15:30:10 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-08-16 17:55:02 +0000 |
| commit | 027f86e6af023b338a0f1d8a999a8f33eeacb010 (patch) | |
| tree | 691450089ec0116cba1ec04b1b73ca3dea39aaf5 /src/mainboard/google/link | |
| parent | 4a9de553c5307595f396b47aaa108bf1dc34638d (diff) | |
ACPI: Add usb_charge_mode_from_gnvs()
Early Chromebook generations stored the information about
USB port power control for S3/S5 sleepstates in GNVS, although
the configuration is static.
Reduce code duplication and react to ACPI S4 as if it was ACPI
S5 request.
Change-Id: I7e6f37a023b0e9317dcf0355dfa70e28d51cdad9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74524
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/google/link')
| -rw-r--r-- | src/mainboard/google/link/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/google/link/acpi_tables.c | 8 | ||||
| -rw-r--r-- | src/mainboard/google/link/smihandler.c | 20 |
3 files changed, 2 insertions, 27 deletions
diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig index e6e4b0bff1..75a15b4e00 100644 --- a/src/mainboard/google/link/Kconfig +++ b/src/mainboard/google/link/Kconfig @@ -2,6 +2,7 @@ if BOARD_GOOGLE_LINK config BOARD_SPECIFIC_OPTIONS def_bool y + select ACPI_GNVS_USB_CHARGECTL select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_LPC diff --git a/src/mainboard/google/link/acpi_tables.c b/src/mainboard/google/link/acpi_tables.c index 9a23474363..c232ade08f 100644 --- a/src/mainboard/google/link/acpi_tables.c +++ b/src/mainboard/google/link/acpi_tables.c @@ -6,14 +6,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - /* Disable USB ports in S3 by default */ - gnvs->s3u0 = 0; - gnvs->s3u1 = 0; - - /* Disable USB ports in S5 by default */ - gnvs->s5u0 = 0; - gnvs->s5u1 = 0; - gnvs->tmps = CTDP_SENSOR_ID; gnvs->f1of = CTDP_NOMINAL_THRESHOLD_OFF; diff --git a/src/mainboard/google/link/smihandler.c b/src/mainboard/google/link/smihandler.c index 951cabcc8c..81972ff42a 100644 --- a/src/mainboard/google/link/smihandler.c +++ b/src/mainboard/google/link/smihandler.c @@ -3,7 +3,6 @@ #include <acpi/acpi.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include <soc/nvs.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/me.h> #include <northbridge/intel/sandybridge/sandybridge.h> @@ -22,24 +21,7 @@ void mainboard_smi_gpi(u32 gpi_sts) void mainboard_smi_sleep(u8 slp_typ) { /* Disable USB charging if required */ - switch (slp_typ) { - case ACPI_S3: - if (gnvs->s3u0 == 0) - google_chromeec_set_usb_charge_mode( - 0, USB_CHARGE_MODE_DISABLED); - if (gnvs->s3u1 == 0) - google_chromeec_set_usb_charge_mode( - 1, USB_CHARGE_MODE_DISABLED); - break; - case ACPI_S5: - if (gnvs->s5u0 == 0) - google_chromeec_set_usb_charge_mode( - 0, USB_CHARGE_MODE_DISABLED); - if (gnvs->s5u1 == 0) - google_chromeec_set_usb_charge_mode( - 1, USB_CHARGE_MODE_DISABLED); - break; - } + chromeec_set_usb_charge_mode(slp_typ); /* Disable SCI and SMI events */ google_chromeec_set_smi_mask(0); |