diff options
| author | david <david_wu@quantatw.com> | 2015-10-23 20:22:22 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-10-28 22:27:24 +0100 |
| commit | ad038c1a14d595c88fb0b4bb6f420e4490b0a67a (patch) | |
| tree | 6f9c0e0e43d7215d73749323def186bef015de00 /src/mainboard/google/lars/abuild.disabled | |
| parent | 6ce7459d6712669b8b8b7579e10a639f4a32371f (diff) | |
google/lars: Copy from intel/kunimitsu
Change-Id: I95129e6f519735e236c9c13b16e21df25b9ea607
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12200
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/lars/abuild.disabled')
| -rw-r--r-- | src/mainboard/google/lars/abuild.disabled | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/lars/abuild.disabled b/src/mainboard/google/lars/abuild.disabled new file mode 100644 index 0000000000..7d1725ac44 --- /dev/null +++ b/src/mainboard/google/lars/abuild.disabled @@ -0,0 +1,2 @@ +Successful builds for this board require the Skylake FSP binary and header files +along with the Skylake microcode files from Intel. |