diff options
| author | Huayang Duan <huayang.duan@mediatek.com> | 2019-06-27 15:33:20 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-21 20:09:24 +0000 |
| commit | 640ca69c0589b2337d2f319c59dd937767be6036 (patch) | |
| tree | af278b73bc84ee38ee37bfd46bc5d2baebed786d /src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c | |
| parent | 8f4590519387c9b1841e65f56f77b81cf9ca63c0 (diff) | |
mediatek/mt8183: support more EMCP LPDDR4X DDR bootup
Support SANDISK SDADA4CR-128G, SAMSUNG KMDP6001DA-B425, KMDV6001DA-B620
EMCP LPDDR4X DDR bootup.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on EMCP DRAM
Change-Id: I7de4c9a27282d3d00f51adf46dcb3d2f3984bfff
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33838
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c')
| -rw-r--r-- | src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c new file mode 100644 index 0000000000..61060d6fdc --- /dev/null +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <soc/emi.h> + +struct sdram_params params = { + .impedance = { + [ODT_OFF] = {0x8, 0x7, 0x0, 0xF}, + [ODT_ON] = {0x9, 0x9, 0x0, 0xE} + }, + .wr_level = { + [CHANNEL_A] = { {0x1F, 0x1C}, {0x1C, 0x1B} }, + [CHANNEL_B] = { {0x27, 0x28}, {0x23, 0x28} } + }, + .cbt_cs = { + [CHANNEL_A] = {0x3, 0x3}, + [CHANNEL_B] = {0x4, 0x6} + }, + .cbt_mr12 = { + [CHANNEL_A] = {0x5C, 0x5A}, + [CHANNEL_B] = {0x5C, 0x5A} + }, + .emi_cona_val = 0xF053F154, + .emi_conh_val = 0x44440003, + .emi_conf_val = 0x00421000, + .chn_emi_cona_val = {0x0444F051, 0x0444F051}, + .cbt_mode_extern = CBT_NORMAL_MODE, + .delay_cell_unit = 868, +}; |